2012/1/27 Georg-Johann Lay <a...@gjlay.de>: > This patch aims at better support of CPSE instruction in cases where otherwise > code like > > TST Rn ; *cmpqi > BREQ .+2 ; branch > RJMP .Lm > > would be produced. As branch is not a single instruction, it cannot be > skipped. > > peephole seems to be the only feature that can do this optimization. I tried a > combine pattern and it works will and is straight forward, but then it's hard > to detect the situations where TST is superfluous because some arithmetic > instruct already set cc0. > > I also tried movqicc to emit code and to prefer jumps that please CPSE, but > the > middle end has it's own understanding of what the code should look like and > it's merely impossible to work against that in the backend. Moreover there was > changes (like for PR45416 to feature specific target) that turned out to give > worse code for AVR. But as so often the "what the hell is AVR?" target is left > behind. > > So here is the patch even though I really don't like peephole[2]. It passes > without regressions and has a bit of code cleanup, too. > > Ok to apply? > > Johann > > * config/avr/avr-protos.h (lpm_reg_rtx, lpm_addr_reg_rtx, > tmp_reg_rtx, zero_reg_rtx, all_regs_rtx, rampz_rtx): Make global. > * config/avr/avr.c: Ditto. > (avr_regnames): Remove because unused. > * config/avr/avr.md (*cpse.ne): New peephole. > (*cpse.eq): New peephole from former cpse peepholes.
Approved. Denis.
