On Thu, Apr 15, 2021 at 6:51 PM H.J. Lu <hjl.to...@gmail.com> wrote:
>
> On Thu, Apr 15, 2021 at 9:34 AM Uros Bizjak <ubiz...@gmail.com> wrote:
> >
> > On Thu, Apr 15, 2021 at 6:26 PM H.J. Lu <hjl.to...@gmail.com> wrote:
> > >
> > > On Thu, Apr 15, 2021 at 9:14 AM Uros Bizjak <ubiz...@gmail.com> wrote:
> > > >
> > > > On Thu, Apr 15, 2021 at 5:11 PM H.J. Lu <hjl.to...@gmail.com> wrote:
> > > > >
> > > > > Use crc32 target option for CRC32 intrinsics to support CRC32 
> > > > > intrinsics
> > > > > without enabling SSE vector instructions.
> > > >
> > > > There is no CRC32 ISA. crc32 is part of SSE4.2 [1] and current
> > > > situation reflects that correctly.
> > >
> > > CRC32 is similar to POPCNT which was originally in SSE4.2.   Now POPCNT
> >
> > It is not similar, POPCNT has its own CPUID flag and can be enabled
> > independently of SSE4.2.
> >
> > > is a separate feature which is also enabled by SSE4.2.   Enable CRC32 only
> > > with SSE4.2 makes it impossible to use CRC32 with -mgeneral-regs-only.   
> > > This
> > > patch addresses this issue the same way as POPCNT.
> >
> > CRC32 doesn't have its own CPUID flag, so PTA_CRC32 is pointless.
>
> PTA_CRC32 shouldn't be added.
>
> > OTOH, the situation is similar with MONITOR and MWAIT. These are
>
> There are no intrinsics for  MONITOR nor MWAIT.
>
> > enabled with SSE3 and don't use XMM registers. Also somewhat similar
> > is FISTTP, but there is no intrinsic for this insn.
>
> True.
>
> Here is the v2 patch without PTA_CRC32.

--- a/gcc/config/i386/gnu-property.c
+++ b/gcc/config/i386/gnu-property.c
@@ -92,6 +92,7 @@ file_end_indicate_exec_stack_and_gnu_property (void)
       /* GNU_PROPERTY_X86_ISA_1_V2.  */
       if (TARGET_CMPXCHG16B
       || (TARGET_64BIT && TARGET_SAHF)
+      || TARGET_CRC32
       || TARGET_POPCNT
       || TARGET_SSE3
       || TARGET_SSSE3

This is not needed. CRC32 is not an ISA, and if someone uses
-mx86-64-v2 -mno-crc32 it does what the documentation says - disables
builtin function.

Otherwise OK, but please also obtain RM's approval at this stage.

Thanks,
Uros.

> --
> H.J.

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