Plain MIPS I testing on mips-elf has quite a few atomic-related failures, due to the lack of LL and SC. Fixed as below.
Tested on mips-elf, mips64-linux-gnu, and a host of others. Applied. Richard gcc/testsuite/ * lib/target-supports.exp (check_effective_target_mips_llsc): New. (check_effective_target_sync_int_long): Use it. (check_effective_target_sync_char_short): Likewise. * gcc.target/mips/atomic-memory-1.c: Restrict error check to mips_llsc. Index: gcc/testsuite/lib/target-supports.exp =================================================================== --- gcc/testsuite/lib/target-supports.exp 2012-02-05 14:34:48.000000000 +0000 +++ gcc/testsuite/lib/target-supports.exp 2012-02-05 14:51:03.000000000 +0000 @@ -890,6 +890,26 @@ proc check_effective_target_mips_newabi_ } "-mabi=64"] } +# Return true if the target is a MIPS target that has access +# to the LL and SC instructions. + +proc check_effective_target_mips_llsc { } { + if { ![istarget mips*-*-*] } { + return 0 + } + # Assume that these instructions are always implemented for + # non-elf* targets, via emulation if necessary. + if { ![istarget *-*-elf*] } { + return 1 + } + # Otherwise assume LL/SC support for everything but MIPS I. + return [check_no_compiler_messages mips_llsc assembly { + #if __mips == 1 + #error FOO + #endif + }] +} + # Return 1 if the current multilib does not generate PIC by default. proc check_effective_target_nonpic { } { @@ -3770,7 +3790,7 @@ proc check_effective_target_sync_int_lon || [istarget powerpc*-*-*] || [istarget sparc64-*-*] || [istarget sparcv9-*-*] - || [istarget mips*-*-*] } { + || [check_effective_target_mips_llsc] } { set et_sync_int_long_saved 1 } } @@ -3800,7 +3820,7 @@ proc check_effective_target_sync_char_sh || [istarget powerpc*-*-*] || [istarget sparc64-*-*] || [istarget sparcv9-*-*] - || [istarget mips*-*-*] } { + || [check_effective_target_mips_llsc] } { set et_sync_char_short_saved 1 } } Index: gcc/testsuite/gcc.target/mips/atomic-memory-1.c =================================================================== --- gcc/testsuite/gcc.target/mips/atomic-memory-1.c 2012-02-05 14:34:48.000000000 +0000 +++ gcc/testsuite/gcc.target/mips/atomic-memory-1.c 2012-02-05 14:50:33.000000000 +0000 @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-message "note: '__sync_nand_and_fetch' changed semantics in GCC 4.4" "" { target *-*-* } 0 } */ +/* { dg-message "note: '__sync_nand_and_fetch' changed semantics in GCC 4.4" "" { target mips_llsc } 0 } */ extern void abort (void); extern void exit (int);