On Wed, May 12, 2021 at 3:06 PM Jakub Jelinek <ja...@redhat.com> wrote:
>
> On Fri, Apr 23, 2021 at 03:46:59PM +0200, Jakub Jelinek via Gcc-patches wrote:
> > On Tue, Feb 09, 2021 at 12:12:24PM +0100, Jakub Jelinek via Gcc-patches 
> > wrote:
> > > As mentioned in the PR, we don't support arithmetic right V2DImode or
> > > V4DImode on x86 without -mavx512vl or -mxop.  The ISAs indeed don't have
> > > {,v}psraq instructions until AVX512VL, but we actually can emulate it 
> > > quite
> > > easily.
> > > One case is arithmetic >> 63, we can just emit {,v}pxor; {,v}pcmpgt for
> > > that for SSE4.2+, or for SSE2 psrad $31; pshufd $0xf5.
> > > Then arithmetic >> by constant > 32, that can be done with {,v}psrad $31
> > > and {,v}psrad $(cst-32) and two operand permutation,
> > > arithmetic >> 32 can be done as {,v}psrad $31 and permutation of that
> > > and the original operand.  Arithmetic >> by constant < 32 can be done
> > > as {,v}psrad $cst and {,v}psrlq $cst and two operand permutation.
> > > And arithmetic >> by variable scalar amount can be done as
> > > arithmetic >> 63, logical >> by the amount, << by (64 - amount of the
> > > >> 63 result; note that the vector << 64 result in 0) and oring together.
> > >
> > > I had to improve the permutation generation so that it actually handles
> > > the needed permutations (or handles them better).
> > >
> > > If not, I guess this is a GCC 12 material.
> > >
> > > 2021-02-09  Jakub Jelinek  <ja...@redhat.com>
> > >
> > >     PR tree-optimization/98856
> > >     * config/i386/i386.c (ix86_shift_rotate_cost): Add CODE argument.
> > >     Expect V2DI and V4DI arithmetic right shifts to be emulated.
> > >     (ix86_rtx_costs, ix86_add_stmt_cost): Adjust ix86_shift_rotate_cost
> > >     caller.
> > >     * config/i386/i386-expand.c (expand_vec_perm_2perm_interleave,
> > >     expand_vec_perm_2perm_pblendv): New functions.
> > >     (ix86_expand_vec_perm_const_1): Use them.
> > >     * config/i386/sse.md (ashr<mode>3<mask_name>): Rename to ...
> > >     (<mask_codefor>ashr<mode>3<mask_name>): ... this.
> > >     (ashr<mode>3): New define_expand with VI248_AVX512BW iterator.
> > >     (ashrv4di3): New define_expand.
> > >     (ashrv2di3): Change condition to TARGET_SSE2, handle !TARGET_XOP
> > >     and !TARGET_AVX512VL expansion.
> > >
> > >     * gcc.target/i386/sse2-psraq-1.c: New test.
> > >     * gcc.target/i386/sse4_2-psraq-1.c: New test.
> > >     * gcc.target/i386/avx-psraq-1.c: New test.
> > >     * gcc.target/i386/avx2-psraq-1.c: New test.
> > >     * gcc.target/i386/avx-pr82370.c: Adjust expected number of vpsrad
> > >     instructions.
> > >     * gcc.target/i386/avx2-pr82370.c: Likewise.
> > >     * gcc.target/i386/avx512f-pr82370.c: Likewise.
> > >     * gcc.target/i386/avx512bw-pr82370.c: Likewise.
> > >     * gcc.dg/torture/vshuf-4.inc: Add two further permutations.
> > >     * gcc.dg/torture/vshuf-8.inc: Likewise.
> >
> > Ok for trunk now?
> > https://gcc.gnu.org/pipermail/gcc-patches/2021-February/565026.html
>
> I'd like to ping this patch.

LGTM.

Thanks,
Uros.

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