gcc/ChangeLog:
* config/csky/csky.c (ck810_legitimate_index_p): Modified for
support "base + index" with DF mode.
* config/csky/constraints.md ("Y"): New constraint for memory operands
without index register.
* config/csky/csky_insn_fpuv2.md
(fpuv3_movdf):At constraints, use "Y" instead of "m" where mov between
memory and general registers, and put them baskwards.
* config/csky/csky_insn_fpuv3.md
(fpuv2_movdf): Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/csky/fldrd_fstrd.c: New.
* gcc.target/csky/fpuv3/fldr64_fstr64.c: New.
---
gcc/config/csky/constraints.md | 4 ++++
gcc/config/csky/csky.c | 3 ++-
gcc/config/csky/csky_insn_fpuv2.md | 4 ++--
gcc/config/csky/csky_insn_fpuv3.md | 16 ++++++++--------
gcc/testsuite/gcc.target/csky/fldrd_fstrd.c | 17 +++++++++++++++++
gcc/testsuite/gcc.target/csky/fpuv3/fldr64_fstr64.c | 18 ++++++++++++++++++
6 files changed, 51 insertions(+), 11 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/csky/fldrd_fstrd.c
create mode 100644 gcc/testsuite/gcc.target/csky/fpuv3/fldr64_fstr64.c
diff --git a/gcc/config/csky/constraints.md b/gcc/config/csky/constraints.md
index c9bc9f2..2641ab3 100644
--- a/gcc/config/csky/constraints.md
+++ b/gcc/config/csky/constraints.md
@@ -38,6 +38,10 @@
"Memory operands with base register, index register"
(match_test "csky_valid_mem_constraint_operand (op, \"W\")"))
+(define_memory_constraint "Y"
+ "Memory operands without index register"
+ (not (match_test "csky_valid_mem_constraint_operand (op, \"W\")")))
+
(define_constraint "R"
"Memory operands whose address is a label_ref"
(and (match_code "mem")
diff --git a/gcc/config/csky/csky.c b/gcc/config/csky/csky.c
index e4c92fe..e55821f 100644
--- a/gcc/config/csky/csky.c
+++ b/gcc/config/csky/csky.c
@@ -3136,7 +3136,8 @@ ck810_legitimate_index_p (machine_mode mode, rtx index,
int strict_p)
/* The follow index is for ldr instruction, the ldr cannot
load dword data, so the mode size should not be larger than
4. */
- else if (GET_MODE_SIZE (mode) <= 4)
+ else if (GET_MODE_SIZE (mode) <= 4
+ || (TARGET_HARD_FLOAT && CSKY_VREG_MODE_P (mode)))
{
if (is_csky_address_register_rtx_p (index, strict_p))
return 1;
diff --git a/gcc/config/csky/csky_insn_fpuv2.md
b/gcc/config/csky/csky_insn_fpuv2.md
index 0a680f8..5a06b22 100644
--- a/gcc/config/csky/csky_insn_fpuv2.md
+++ b/gcc/config/csky/csky_insn_fpuv2.md
@@ -461,8 +461,8 @@
)
(define_insn "*fpuv2_movdf"
- [(set (match_operand:DF 0 "nonimmediate_operand" "=r,r, r,m, v,?r,Q,v,v,v")
- (match_operand:DF 1 "general_operand" " r,m,mF,r,?r, v,v,Q,v,m"))]
+ [(set (match_operand:DF 0 "nonimmediate_operand" "=r, v,?r,Q,v,v,v,r, r,Y")
+ (match_operand:DF 1 "general_operand" " r,?r, v,v,Q,v,m,Y,YF,r"))]
"CSKY_ISA_FEATURE (fpv2_df)"
"* return csky_output_movedouble(operands, DFmode);"
[(set (attr "length")
diff --git a/gcc/config/csky/csky_insn_fpuv3.md
b/gcc/config/csky/csky_insn_fpuv3.md
index 053673c..7849795 100644
--- a/gcc/config/csky/csky_insn_fpuv3.md
+++ b/gcc/config/csky/csky_insn_fpuv3.md
@@ -71,27 +71,27 @@
)
(define_insn "*fpv3_movdf"
- [(set (match_operand:DF 0 "nonimmediate_operand" "=r,r, r,m,v,?r,Q,v,v,v, v")
- (match_operand:DF 1 "general_operand" "
r,m,mF,r,?r,v,v,Q,v,m,Dv"))]
+ [(set (match_operand:DF 0 "nonimmediate_operand" "=r, v,?r,Q,v,v,v, v,r,
r,Y")
+ (match_operand:DF 1 "general_operand" " r,?r,
v,v,Q,v,m,Dv,Y,YF,r"))]
"CSKY_ISA_FEATURE(fpv3_df)"
"*
switch (which_alternative)
{
- case 4:
+ case 1:
if (TARGET_BIG_ENDIAN)
return \"fmtvr.64\\t%0, %R1, %1\";
return \"fmtvr.64\\t%0, %1, %R1\";
- case 5:
+ case 2:
if (TARGET_BIG_ENDIAN)
return \"fmfvr.64\\t%R0, %0, %1\";
return \"fmfvr.64\\t%0, %R0, %1\";
+ case 3:
+ case 4:
case 6:
- case 7:
- case 9:
return fpuv3_output_move(operands);
- case 8:
+ case 5:
return \"fmov.64\\t%0, %1\";
- case 10:
+ case 7:
return \"fmovi.64\\t%0, %1\";
default:
return csky_output_movedouble(operands, DFmode);
diff --git a/gcc/testsuite/gcc.target/csky/fldrd_fstrd.c
b/gcc/testsuite/gcc.target/csky/fldrd_fstrd.c
new file mode 100644
index 0000000..024de18
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/fldrd_fstrd.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-csky-options "-mcpu=ck810f -O1 -mhard-float" } */
+
+double fldrd (double *pd, int index)
+{
+ return pd[index];
+}
+
+/* { dg-final { scan-assembler "fldrd" } } */
+
+void fstrd (double *pd, int index, double d)
+{
+ pd[index] = d;
+}
+
+/* { dg-final { scan-assembler "fstrd" } } */
+
diff --git a/gcc/testsuite/gcc.target/csky/fpuv3/fldr64_fstr64.c
b/gcc/testsuite/gcc.target/csky/fpuv3/fldr64_fstr64.c
new file mode 100644
index 0000000..cd367e5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/fpuv3/fldr64_fstr64.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-skip-if "test is specific to ck860f" { csky-*-* } { "*" } { "-mcpu=ck860*f*
-mfloat-abi=hard" "-mcpu=ck860*f* -mhard-float" } } */
+/* { dg-options "-O1 -mfpu=fpv3" } */
+
+double fldr64 (double *pd, int index)
+{
+ return pd[index];
+}
+
+/* { dg-final { scan-assembler "fldr.64" } } */
+
+void fstr64 (double *pd, int index, double d)
+{
+ pd[index] = d;
+}
+
+/* { dg-final { scan-assembler "fstr.64" } } */
+
