Hi All,
On passing +cdecp[0-7] extension to the -march string in command line options,
multilib linking is failing as mentioned in PR100856. This patch fixes this
issue by generating a separate -march string only for multilib comparison.
Regression tested on arm-none-eabi and found no regressions.
Ok for master?
Regards,
Srinath.
gcc/ChangeLog:
2021-06-01 Srinath Parvathaneni <[email protected]>
PR target/100856
* common/config/arm/arm-common.c (arm_canon_arch_option): Modify
function to generate canonical march string after removing cde related
compiler extensions.
(arm_canon_arch_multilib_option): Define function.
* config/arm/arm-cpus.in (CDE_LIST): Define fgroup.
* config/arm/arm.h (arm_canon_arch_multilib_option): Define macro.
(CANON_ARCH_MULTILIB_SPEC_FUNCTION): Define macro.
(ARCH_CANONICAL_MULTILIB_SPECS): Define macro.
(TARGET_MULTLILIB_ARCH): Define macro.
* gcc.c (used_arg_t::operator ()): Add condition to generate separate
march string for multilib matching.
gcc/testsuite/ChangeLog:
2021-06-01 Srinath Parvathaneni <[email protected]>
PR target/100856
* gcc.target/arm/acle/pr100856.c: New test.
* gcc.target/arm/multilib.exp: Modify.
############### Attachment also inlined for ease of reply ###############
diff --git a/gcc/common/config/arm/arm-common.c
b/gcc/common/config/arm/arm-common.c
index
9980af6885c3dfe68f61fa0f39b23022b4e59c19..7d8c6e5253f3f1683eed99f479a09186a46c2d22
100644
--- a/gcc/common/config/arm/arm-common.c
+++ b/gcc/common/config/arm/arm-common.c
@@ -616,6 +616,8 @@ public:
}
};
+static int multilib_arch = 0;
+
/* Generate a canonical representation of the -march option from the
current -march string (if given) and other options on the command
line that might affect the architecture. This aids multilib selection
@@ -703,6 +705,14 @@ arm_canon_arch_option (int argc, const char **argv)
arm_initialize_isa (target_isa, selected_arch->common.isa_bits);
arm_parse_option_features (target_isa, &selected_arch->common,
strchr (arch, '+'));
+ if (multilib_arch == 1)
+ {
+ const enum isa_feature cde_bitlist[] = {ISA_ALL_CDE, isa_nobit};
+ sbitmap isa_cdebits = sbitmap_alloc (isa_num_bits);
+ arm_initialize_isa (isa_cdebits, cde_bitlist);
+ bitmap_and_compl (target_isa, target_isa, isa_cdebits);
+ }
+
if (fpu && strcmp (fpu, "auto") != 0)
{
/* We assume that architectures do not have any FPU bits
@@ -786,18 +796,27 @@ arm_canon_arch_option (int argc, const char **argv)
arm_initialize_isa (base_isa, selected_arch->common.isa_bits);
- /* Architecture has no extension options, so just return the canonical
- architecture name. */
- if (selected_arch->common.extensions == NULL)
- return selected_arch->common.name;
-
/* We're only interested in extension bits. */
bitmap_and_compl (target_isa, target_isa, base_isa);
+ /* Architecture has no extension options, so just return the canonical
+ architecture name. */
+ if (multilib_arch == 0 && selected_arch->common.extensions == NULL)
+ return selected_arch->common.name;
/* There are no extensions needed. Just return the canonical architecture
name. */
- if (bitmap_empty_p (target_isa))
+ else if (multilib_arch == 0 && bitmap_empty_p (target_isa))
return selected_arch->common.name;
+ else if (multilib_arch == 1
+ && (selected_arch->common.extensions == NULL
+ || bitmap_empty_p (target_isa)))
+ {
+ canonical_arch = (char *) xmalloc (strlen (selected_arch->common.name)
+ + strlen ("march="));
+ strcpy (canonical_arch, "march=");
+ strcat (canonical_arch, selected_arch->common.name);
+ return canonical_arch;
+ }
/* What is left is the architecture that the compiler will target. We
now need to map that back into a suitable option+features list.
@@ -899,10 +918,20 @@ arm_canon_arch_option (int argc, const char **argv)
}
}
- canonical_arch
- = (char *) xmalloc (len + strlen (selected_arch->common.name));
-
- strcpy (canonical_arch, selected_arch->common.name);
+ if (multilib_arch == 1)
+ {
+ canonical_arch
+ = (char *) xmalloc (len + strlen (selected_arch->common.name)
+ + strlen ("march="));
+ strcpy (canonical_arch, "march=");
+ strcat (canonical_arch, selected_arch->common.name);
+ }
+ else
+ {
+ canonical_arch
+ = (char *) xmalloc (len + strlen (selected_arch->common.name));
+ strcpy (canonical_arch, selected_arch->common.name);
+ }
for (std::list<candidate_extension *>::iterator iter = extensions.begin ();
iter != extensions.end (); ++iter)
@@ -1069,3 +1098,15 @@ arm_asm_auto_mfpu (int argc, const char **argv)
#define TARGET_EXCEPT_UNWIND_INFO arm_except_unwind_info
struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
+
+/* This function returns the canonical -march string after removing the
compiler
+ extension options which are not required for multilib linking. */
+const char *
+arm_canon_arch_multilib_option (int argc, const char **argv)
+{
+ char const *multilib_option = NULL;
+ multilib_arch = 1;
+ multilib_option = arm_canon_arch_option ( argc, argv);
+ multilib_arch = 0;
+ return multilib_option;
+}
diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in
index
0becb4385b675d0e08ea08c97785cabfa8cf7026..00944f8e9071d6097f703843fee8822d0ee08d6a
100644
--- a/gcc/config/arm/arm-cpus.in
+++ b/gcc/config/arm/arm-cpus.in
@@ -324,6 +324,8 @@ define implied vfp_base MVE MVE_FP ALL_FP
# need to ignore it for matching purposes.
define fgroup ALL_QUIRKS quirk_no_volatile_ce quirk_armv6kz quirk_cm3_ldrd
xscale quirk_no_asmcpu
+define fgroup ALL_CDE cdecp0 cdecp1 cdecp2 cdecp3 cdecp4 cdecp5 cdecp6 cdecp7
+
# Architecture entries
# format:
# begin arch <name>
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index
8e5bd5793237e531aa83d998f5756b459dbcb6a7..0859c2dc1d60b98935242fce56b17f5f67fd1509
100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -2444,10 +2444,14 @@ extern const char *host_detect_local_cpu (int argc,
const char **argv);
#endif
const char *arm_canon_arch_option (int argc, const char **argv);
+const char *arm_canon_arch_multilib_option (int argc, const char **argv);
#define CANON_ARCH_SPEC_FUNCTION \
{ "canon_arch", arm_canon_arch_option },
+#define CANON_ARCH_MULTILIB_SPEC_FUNCTION \
+ { "canon_arch_multilib", arm_canon_arch_multilib_option },
+
const char *arm_be8_option (int argc, const char **argv);
#define BE8_SPEC_FUNCTION \
{ "be8_linkopt", arm_be8_option },
@@ -2456,6 +2460,7 @@ const char *arm_be8_option (int argc, const char **argv);
MCPU_MTUNE_NATIVE_FUNCTIONS \
ASM_CPU_SPEC_FUNCTIONS \
CANON_ARCH_SPEC_FUNCTION \
+ CANON_ARCH_MULTILIB_SPEC_FUNCTION \
TARGET_MODE_SPEC_FUNCTIONS \
BE8_SPEC_FUNCTION
@@ -2476,6 +2481,15 @@ const char *arm_be8_option (int argc, const char **argv);
" %{mfloat-abi=*: abi %*}" \
" %<march=*) "
+/* Generate a canonical string without compiler extension which are not needed
+ for multilib linking. */
+#define ARCH_CANONICAL_MULTILIB_SPECS \
+ "%{mcpu=*: cpu %*} " \
+ "%{march=*: arch %*} " \
+ "%{mfpu=*: fpu %*} " \
+ "%{mfloat-abi=*: abi %*}" \
+ "%<march=*) "
+
/* Complete set of specs for the driver. Commas separate the
individual rules so that any option suppression (%<opt...)is
completed before starting subsequent rules. */
@@ -2484,6 +2498,8 @@ const char *arm_be8_option (int argc, const char **argv);
TARGET_MODE_SPECS, \
ARCH_CANONICAL_SPECS
+#define TARGET_MULTLILIB_ARCH 1
+
#define TARGET_SUPPORTS_WIDE_INT 1
/* For switching between functions with different target attributes. */
diff --git a/gcc/gcc.c b/gcc/gcc.c
index
4c1a659d5e8929ed2267694c0d62ce476a099bf5..7984806f5fe0e65021daffaa055793890db23228
100644
--- a/gcc/gcc.c
+++ b/gcc/gcc.c
@@ -9414,9 +9414,27 @@ used_arg_t::operator () (const char *p, int len)
if ((switches[i].live_cond & SWITCH_IGNORE) == 0)
{
int xlen = strlen (switches[i].part1);
+#ifdef TARGET_MULTLILIB_ARCH
+ const char *arch_multilib = NULL;
+ if (!strncmp (switches[i].part1, "march=", strlen ("march=")))
+ {
+ arch_multilib
+ = eval_spec_function ("canon_arch_multilib",
+ ARCH_CANONICAL_MULTILIB_SPECS, NULL);
+ xlen = strlen (arch_multilib);
+ }
+ for (j = 0; j < cnt; j++)
+ if (xlen == matches[j].len
+ && ((arch_multilib != NULL
+ && !strncmp (arch_multilib, matches[j].str, xlen))
+ || (arch_multilib == NULL
+ && !strncmp (switches[i].part1, matches[j].str,
+ xlen))))
+#else
for (j = 0; j < cnt; j++)
if (xlen == matches[j].len
&& ! strncmp (switches[i].part1, matches[j].str, xlen))
+#endif
{
mswitches[n_mswitches].str = matches[j].replace;
mswitches[n_mswitches].len = matches[j].rep_len;
@@ -9425,6 +9443,10 @@ used_arg_t::operator () (const char *p, int len)
n_mswitches++;
break;
}
+#ifdef TARGET_MULTLILIB_ARCH
+ if (arch_multilib != NULL)
+ free (CONST_CAST (char *, arch_multilib));
+#endif
}
/* Add MULTILIB_DEFAULTS switches too, as long as they were not present
diff --git a/gcc/testsuite/gcc.target/arm/acle/pr100856.c
b/gcc/testsuite/gcc.target/arm/acle/pr100856.c
new file mode 100644
index
0000000000000000000000000000000000000000..5bc030e2e46bf89dfe7f3b9d0dab1e07947e8d5e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/acle/pr100856.c
@@ -0,0 +1,10 @@
+/* { dg-do run } */
+/* { dg-require-effective-target arm_v8_1m_main_cde_mve_ok } */
+/* { dg-add-options arm_v8_1m_main_cde_mve } */
+
+#include "arm_cde.h"
+
+int main()
+{
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/arm/multilib.exp
b/gcc/testsuite/gcc.target/arm/multilib.exp
index
46f2d86de3c05c184b2ec12af53e2053ddc3b157..4b30025db8cbdcd37bbb3a0be6c345b9d48818c4
100644
--- a/gcc/testsuite/gcc.target/arm/multilib.exp
+++ b/gcc/testsuite/gcc.target/arm/multilib.exp
@@ -840,6 +840,119 @@ if {[multilib_config "rmprofile"] } {
{-mcpu=cortex-m55+nomve+nofp -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main/nofp"
{-mcpu=cortex-m55+nodsp+nofp -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
{-mcpu=cortex-m55+nodsp+nofp -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+cdecp0 -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+cdecp0 -mfpu=vfpv3xd -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=vfpv3xd -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=vfpv3xd -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=vfpv3xd -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=vfpv3xd -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+cdecp0 -mfpu=vfpv3xd-fp16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=vfpv3xd-fp16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=vfpv3xd-fp16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=vfpv3xd-fp16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=vfpv3xd-fp16
-mfloat-abi=soft} "thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+cdecp0 -mfpu=fpv4-sp-d16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=fpv4-sp-d16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=fpv4-sp-d16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=fpv4-sp-d16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=fpv4-sp-d16
-mfloat-abi=soft} "thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+cdecp0 -mfpu=fpv5-sp-d16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=fpv5-sp-d16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=fpv5-sp-d16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=fpv5-sp-d16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=fpv5-sp-d16
-mfloat-abi=soft} "thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=auto -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=auto -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=auto -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=auto -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+cdecp0 -mfpu=vfpv3xd -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=vfpv3xd -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=vfpv3xd -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=vfpv3xd -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=vfpv3xd -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+cdecp0 -mfpu=vfpv3xd-fp16 -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=vfpv3xd-fp16 -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=vfpv3xd-fp16 -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=vfpv3xd-fp16 -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=vfpv3xd-fp16
-mfloat-abi=hard} "thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+cdecp0 -mfpu=fpv4-sp-d16 -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=fpv4-sp-d16 -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=fpv4-sp-d16 -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=fpv4-sp-d16 -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=fpv4-sp-d16
-mfloat-abi=hard} "thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+cdecp0 -mfpu=fpv5-sp-d16 -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=fpv5-sp-d16 -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=fpv5-sp-d16 -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=fpv5-sp-d16 -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=fpv5-sp-d16
-mfloat-abi=hard} "thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+cdecp0 -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+cdecp0 -mfpu=vfpv3xd -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=vfpv3xd -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=vfpv3xd -mfloat-abi=softfp}
"thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=vfpv3xd -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=vfpv3xd -mfloat-abi=softfp}
"thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+cdecp0 -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=vfpv3xd-fp16
-mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=vfpv3xd-fp16
-mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=vfpv3xd-fp16
-mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+cdecp0 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp}
"thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=fpv4-sp-d16
-mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=fpv4-sp-d16
-mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+cdecp0 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp}
"thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=fpv5-sp-d16
-mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=fpv5-sp-d16
-mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=softfp}
"thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=softfp}
"thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=softfp}
"thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=softfp}
"thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=fpv5-d16
-mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
+ {-march=armv8.1-m.main+cdecp0 -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8.1-m.main+dsp+cdecp0 -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8.1-m.main+dsp+fp+cdecp0 -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8.1-m.main+dsp+fp.dp+cdecp0 -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8.1-m.main+cdecp0 -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main/nofp"
+ {-march=armv8.1-m.main+dsp+cdecp0 -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main/nofp"
+ {-march=armv8.1-m.main+dsp+fp+cdecp0 -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8.1-m.main+dsp+fp.dp+cdecp0 -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main+dp/softfp"
+ {-march=armv8.1-m.main+dsp+fp+cdecp0 -mfpu=auto -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8.1-m.main+dsp+fp.dp+cdecp0 -mfpu=auto -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8.1-m.main+mve+cdecp0 -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8.1-m.main+mve.fp+cdecp0 -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8.1-m.main+mve+cdecp0 -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main/nofp"
+ {-march=armv8.1-m.main+mve.fp+cdecp0 -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8.1-m.main+mve+cdecp0 -mfpu=auto -mfloat-abi=hard}
"thumb/v8.1-m.main+mve/hard"
+ {-march=armv8.1-m.main+mve+fp+cdecp0 -mfpu=auto -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8.1-m.main+mve+fp+cdecp0 -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8.1-m.main+mve.fp+cdecp0 -mfpu=auto -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8.1-m.main+mve+fp.dp+cdecp0 -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8.1-m.main+mve.fp+fp.dp+cdecp0 -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8.1-m.main+mve+fp.dp+cdecp0 -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main+dp/softfp"
+ {-march=armv8.1-m.main+mve.fp+fp.dp+cdecp0 -mfpu=auto
-mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
+ {-march=armv8.1-m.main+mve+fp.dp+cdecp0 -mfpu=auto -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8.1-m.main+mve.fp+fp.dp+cdecp0 -mfpu=auto -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
} {
check_multi_dir $opts $dir
}
diff --git a/gcc/common/config/arm/arm-common.c
b/gcc/common/config/arm/arm-common.c
index
9980af6885c3dfe68f61fa0f39b23022b4e59c19..7d8c6e5253f3f1683eed99f479a09186a46c2d22
100644
--- a/gcc/common/config/arm/arm-common.c
+++ b/gcc/common/config/arm/arm-common.c
@@ -616,6 +616,8 @@ public:
}
};
+static int multilib_arch = 0;
+
/* Generate a canonical representation of the -march option from the
current -march string (if given) and other options on the command
line that might affect the architecture. This aids multilib selection
@@ -703,6 +705,14 @@ arm_canon_arch_option (int argc, const char **argv)
arm_initialize_isa (target_isa, selected_arch->common.isa_bits);
arm_parse_option_features (target_isa, &selected_arch->common,
strchr (arch, '+'));
+ if (multilib_arch == 1)
+ {
+ const enum isa_feature cde_bitlist[] = {ISA_ALL_CDE, isa_nobit};
+ sbitmap isa_cdebits = sbitmap_alloc (isa_num_bits);
+ arm_initialize_isa (isa_cdebits, cde_bitlist);
+ bitmap_and_compl (target_isa, target_isa, isa_cdebits);
+ }
+
if (fpu && strcmp (fpu, "auto") != 0)
{
/* We assume that architectures do not have any FPU bits
@@ -786,18 +796,27 @@ arm_canon_arch_option (int argc, const char **argv)
arm_initialize_isa (base_isa, selected_arch->common.isa_bits);
- /* Architecture has no extension options, so just return the canonical
- architecture name. */
- if (selected_arch->common.extensions == NULL)
- return selected_arch->common.name;
-
/* We're only interested in extension bits. */
bitmap_and_compl (target_isa, target_isa, base_isa);
+ /* Architecture has no extension options, so just return the canonical
+ architecture name. */
+ if (multilib_arch == 0 && selected_arch->common.extensions == NULL)
+ return selected_arch->common.name;
/* There are no extensions needed. Just return the canonical architecture
name. */
- if (bitmap_empty_p (target_isa))
+ else if (multilib_arch == 0 && bitmap_empty_p (target_isa))
return selected_arch->common.name;
+ else if (multilib_arch == 1
+ && (selected_arch->common.extensions == NULL
+ || bitmap_empty_p (target_isa)))
+ {
+ canonical_arch = (char *) xmalloc (strlen (selected_arch->common.name)
+ + strlen ("march="));
+ strcpy (canonical_arch, "march=");
+ strcat (canonical_arch, selected_arch->common.name);
+ return canonical_arch;
+ }
/* What is left is the architecture that the compiler will target. We
now need to map that back into a suitable option+features list.
@@ -899,10 +918,20 @@ arm_canon_arch_option (int argc, const char **argv)
}
}
- canonical_arch
- = (char *) xmalloc (len + strlen (selected_arch->common.name));
-
- strcpy (canonical_arch, selected_arch->common.name);
+ if (multilib_arch == 1)
+ {
+ canonical_arch
+ = (char *) xmalloc (len + strlen (selected_arch->common.name)
+ + strlen ("march="));
+ strcpy (canonical_arch, "march=");
+ strcat (canonical_arch, selected_arch->common.name);
+ }
+ else
+ {
+ canonical_arch
+ = (char *) xmalloc (len + strlen (selected_arch->common.name));
+ strcpy (canonical_arch, selected_arch->common.name);
+ }
for (std::list<candidate_extension *>::iterator iter = extensions.begin ();
iter != extensions.end (); ++iter)
@@ -1069,3 +1098,15 @@ arm_asm_auto_mfpu (int argc, const char **argv)
#define TARGET_EXCEPT_UNWIND_INFO arm_except_unwind_info
struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
+
+/* This function returns the canonical -march string after removing the
compiler
+ extension options which are not required for multilib linking. */
+const char *
+arm_canon_arch_multilib_option (int argc, const char **argv)
+{
+ char const *multilib_option = NULL;
+ multilib_arch = 1;
+ multilib_option = arm_canon_arch_option ( argc, argv);
+ multilib_arch = 0;
+ return multilib_option;
+}
diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in
index
0becb4385b675d0e08ea08c97785cabfa8cf7026..00944f8e9071d6097f703843fee8822d0ee08d6a
100644
--- a/gcc/config/arm/arm-cpus.in
+++ b/gcc/config/arm/arm-cpus.in
@@ -324,6 +324,8 @@ define implied vfp_base MVE MVE_FP ALL_FP
# need to ignore it for matching purposes.
define fgroup ALL_QUIRKS quirk_no_volatile_ce quirk_armv6kz quirk_cm3_ldrd
xscale quirk_no_asmcpu
+define fgroup ALL_CDE cdecp0 cdecp1 cdecp2 cdecp3 cdecp4 cdecp5 cdecp6 cdecp7
+
# Architecture entries
# format:
# begin arch <name>
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index
8e5bd5793237e531aa83d998f5756b459dbcb6a7..0859c2dc1d60b98935242fce56b17f5f67fd1509
100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -2444,10 +2444,14 @@ extern const char *host_detect_local_cpu (int argc,
const char **argv);
#endif
const char *arm_canon_arch_option (int argc, const char **argv);
+const char *arm_canon_arch_multilib_option (int argc, const char **argv);
#define CANON_ARCH_SPEC_FUNCTION \
{ "canon_arch", arm_canon_arch_option },
+#define CANON_ARCH_MULTILIB_SPEC_FUNCTION \
+ { "canon_arch_multilib", arm_canon_arch_multilib_option },
+
const char *arm_be8_option (int argc, const char **argv);
#define BE8_SPEC_FUNCTION \
{ "be8_linkopt", arm_be8_option },
@@ -2456,6 +2460,7 @@ const char *arm_be8_option (int argc, const char **argv);
MCPU_MTUNE_NATIVE_FUNCTIONS \
ASM_CPU_SPEC_FUNCTIONS \
CANON_ARCH_SPEC_FUNCTION \
+ CANON_ARCH_MULTILIB_SPEC_FUNCTION \
TARGET_MODE_SPEC_FUNCTIONS \
BE8_SPEC_FUNCTION
@@ -2476,6 +2481,15 @@ const char *arm_be8_option (int argc, const char **argv);
" %{mfloat-abi=*: abi %*}" \
" %<march=*) "
+/* Generate a canonical string without compiler extension which are not needed
+ for multilib linking. */
+#define ARCH_CANONICAL_MULTILIB_SPECS \
+ "%{mcpu=*: cpu %*} " \
+ "%{march=*: arch %*} " \
+ "%{mfpu=*: fpu %*} " \
+ "%{mfloat-abi=*: abi %*}" \
+ "%<march=*) "
+
/* Complete set of specs for the driver. Commas separate the
individual rules so that any option suppression (%<opt...)is
completed before starting subsequent rules. */
@@ -2484,6 +2498,8 @@ const char *arm_be8_option (int argc, const char **argv);
TARGET_MODE_SPECS, \
ARCH_CANONICAL_SPECS
+#define TARGET_MULTLILIB_ARCH 1
+
#define TARGET_SUPPORTS_WIDE_INT 1
/* For switching between functions with different target attributes. */
diff --git a/gcc/gcc.c b/gcc/gcc.c
index
4c1a659d5e8929ed2267694c0d62ce476a099bf5..7984806f5fe0e65021daffaa055793890db23228
100644
--- a/gcc/gcc.c
+++ b/gcc/gcc.c
@@ -9414,9 +9414,27 @@ used_arg_t::operator () (const char *p, int len)
if ((switches[i].live_cond & SWITCH_IGNORE) == 0)
{
int xlen = strlen (switches[i].part1);
+#ifdef TARGET_MULTLILIB_ARCH
+ const char *arch_multilib = NULL;
+ if (!strncmp (switches[i].part1, "march=", strlen ("march=")))
+ {
+ arch_multilib
+ = eval_spec_function ("canon_arch_multilib",
+ ARCH_CANONICAL_MULTILIB_SPECS, NULL);
+ xlen = strlen (arch_multilib);
+ }
+ for (j = 0; j < cnt; j++)
+ if (xlen == matches[j].len
+ && ((arch_multilib != NULL
+ && !strncmp (arch_multilib, matches[j].str, xlen))
+ || (arch_multilib == NULL
+ && !strncmp (switches[i].part1, matches[j].str,
+ xlen))))
+#else
for (j = 0; j < cnt; j++)
if (xlen == matches[j].len
&& ! strncmp (switches[i].part1, matches[j].str, xlen))
+#endif
{
mswitches[n_mswitches].str = matches[j].replace;
mswitches[n_mswitches].len = matches[j].rep_len;
@@ -9425,6 +9443,10 @@ used_arg_t::operator () (const char *p, int len)
n_mswitches++;
break;
}
+#ifdef TARGET_MULTLILIB_ARCH
+ if (arch_multilib != NULL)
+ free (CONST_CAST (char *, arch_multilib));
+#endif
}
/* Add MULTILIB_DEFAULTS switches too, as long as they were not present
diff --git a/gcc/testsuite/gcc.target/arm/acle/pr100856.c
b/gcc/testsuite/gcc.target/arm/acle/pr100856.c
new file mode 100644
index
0000000000000000000000000000000000000000..5bc030e2e46bf89dfe7f3b9d0dab1e07947e8d5e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/acle/pr100856.c
@@ -0,0 +1,10 @@
+/* { dg-do run } */
+/* { dg-require-effective-target arm_v8_1m_main_cde_mve_ok } */
+/* { dg-add-options arm_v8_1m_main_cde_mve } */
+
+#include "arm_cde.h"
+
+int main()
+{
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/arm/multilib.exp
b/gcc/testsuite/gcc.target/arm/multilib.exp
index
46f2d86de3c05c184b2ec12af53e2053ddc3b157..4b30025db8cbdcd37bbb3a0be6c345b9d48818c4
100644
--- a/gcc/testsuite/gcc.target/arm/multilib.exp
+++ b/gcc/testsuite/gcc.target/arm/multilib.exp
@@ -840,6 +840,119 @@ if {[multilib_config "rmprofile"] } {
{-mcpu=cortex-m55+nomve+nofp -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main/nofp"
{-mcpu=cortex-m55+nodsp+nofp -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
{-mcpu=cortex-m55+nodsp+nofp -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+cdecp0 -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+cdecp0 -mfpu=vfpv3xd -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=vfpv3xd -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=vfpv3xd -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=vfpv3xd -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=vfpv3xd -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+cdecp0 -mfpu=vfpv3xd-fp16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=vfpv3xd-fp16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=vfpv3xd-fp16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=vfpv3xd-fp16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=vfpv3xd-fp16
-mfloat-abi=soft} "thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+cdecp0 -mfpu=fpv4-sp-d16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=fpv4-sp-d16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=fpv4-sp-d16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=fpv4-sp-d16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=fpv4-sp-d16
-mfloat-abi=soft} "thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+cdecp0 -mfpu=fpv5-sp-d16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=fpv5-sp-d16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=fpv5-sp-d16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=fpv5-sp-d16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=fpv5-sp-d16
-mfloat-abi=soft} "thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=auto -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=auto -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=auto -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=auto -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+cdecp0 -mfpu=vfpv3xd -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=vfpv3xd -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=vfpv3xd -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=vfpv3xd -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=vfpv3xd -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+cdecp0 -mfpu=vfpv3xd-fp16 -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=vfpv3xd-fp16 -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=vfpv3xd-fp16 -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=vfpv3xd-fp16 -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=vfpv3xd-fp16
-mfloat-abi=hard} "thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+cdecp0 -mfpu=fpv4-sp-d16 -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=fpv4-sp-d16 -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=fpv4-sp-d16 -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=fpv4-sp-d16 -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=fpv4-sp-d16
-mfloat-abi=hard} "thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+cdecp0 -mfpu=fpv5-sp-d16 -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=fpv5-sp-d16 -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=fpv5-sp-d16 -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=fpv5-sp-d16 -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=fpv5-sp-d16
-mfloat-abi=hard} "thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8-m.main+cdecp0 -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main/nofp"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+cdecp0 -mfpu=vfpv3xd -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=vfpv3xd -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=vfpv3xd -mfloat-abi=softfp}
"thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=vfpv3xd -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=vfpv3xd -mfloat-abi=softfp}
"thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+cdecp0 -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=vfpv3xd-fp16
-mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=vfpv3xd-fp16
-mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=vfpv3xd-fp16
-mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+cdecp0 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp}
"thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=fpv4-sp-d16
-mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=fpv4-sp-d16
-mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+cdecp0 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp}
"thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=fpv5-sp-d16
-mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=fpv5-sp-d16
-mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=softfp}
"thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+fp+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=softfp}
"thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+fp.dp+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=softfp}
"thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+fp+dsp+cdecp0 -mfpu=fpv5-d16 -mfloat-abi=softfp}
"thumb/v8-m.main+dp/softfp"
+ {-march=armv8-m.main+fp.dp+dsp+cdecp0 -mfpu=fpv5-d16
-mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
+ {-march=armv8.1-m.main+cdecp0 -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8.1-m.main+dsp+cdecp0 -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8.1-m.main+dsp+fp+cdecp0 -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8.1-m.main+dsp+fp.dp+cdecp0 -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8.1-m.main+cdecp0 -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main/nofp"
+ {-march=armv8.1-m.main+dsp+cdecp0 -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main/nofp"
+ {-march=armv8.1-m.main+dsp+fp+cdecp0 -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8.1-m.main+dsp+fp.dp+cdecp0 -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main+dp/softfp"
+ {-march=armv8.1-m.main+dsp+fp+cdecp0 -mfpu=auto -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8.1-m.main+dsp+fp.dp+cdecp0 -mfpu=auto -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8.1-m.main+mve+cdecp0 -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8.1-m.main+mve.fp+cdecp0 -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8.1-m.main+mve+cdecp0 -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main/nofp"
+ {-march=armv8.1-m.main+mve.fp+cdecp0 -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8.1-m.main+mve+cdecp0 -mfpu=auto -mfloat-abi=hard}
"thumb/v8.1-m.main+mve/hard"
+ {-march=armv8.1-m.main+mve+fp+cdecp0 -mfpu=auto -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8.1-m.main+mve+fp+cdecp0 -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main+fp/softfp"
+ {-march=armv8.1-m.main+mve.fp+cdecp0 -mfpu=auto -mfloat-abi=hard}
"thumb/v8-m.main+fp/hard"
+ {-march=armv8.1-m.main+mve+fp.dp+cdecp0 -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8.1-m.main+mve.fp+fp.dp+cdecp0 -mfpu=auto -mfloat-abi=soft}
"thumb/v8-m.main/nofp"
+ {-march=armv8.1-m.main+mve+fp.dp+cdecp0 -mfpu=auto -mfloat-abi=softfp}
"thumb/v8-m.main+dp/softfp"
+ {-march=armv8.1-m.main+mve.fp+fp.dp+cdecp0 -mfpu=auto
-mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
+ {-march=armv8.1-m.main+mve+fp.dp+cdecp0 -mfpu=auto -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
+ {-march=armv8.1-m.main+mve.fp+fp.dp+cdecp0 -mfpu=auto -mfloat-abi=hard}
"thumb/v8-m.main+dp/hard"
} {
check_multi_dir $opts $dir
}
