Hi, This patch adds tests to verify that Neon narrowing-shift instructions clear the top half of the result vector. It is sufficient to show that a subsequent combine with a zero-vector is optimized away - leaving just the narrowing-shift instruction.
Ok for master? Thanks, Jonathan --- gcc/testsuite/ChangeLog: 2021-06-15 Jonathan Wright <jonathan.wri...@arm.com> * gcc.target/aarch64/narrow_zero_high_half.c: New test.
rb14569.patch
Description: rb14569.patch