On 22/06/2021 18:14, Hafiz Abid Qadeer wrote:
Map GCN address spaces to the proposed DWARF address spaces defined by AMD at
https://llvm.org/docs/AMDGPUUsage.html#amdgpu-dwarf-address-class-mapping-table

gcc/

        * config/gcn/gcn.c: Include dwarf2.h.
        (gcn_addr_space_debug): New function.
        (TARGET_ADDR_SPACE_DEBUG): New hook.
---
  gcc/config/gcn/gcn.c | 29 +++++++++++++++++++++++++++++
  1 file changed, 29 insertions(+)

diff --git a/gcc/config/gcn/gcn.c b/gcc/config/gcn/gcn.c
index 0eac3aa3844..25996dc83de 100644
--- a/gcc/config/gcn/gcn.c
+++ b/gcc/config/gcn/gcn.c
@@ -50,6 +50,7 @@
  #include "varasm.h"
  #include "intl.h"
  #include "rtl-iter.h"
+#include "dwarf2.h"
/* This file should be included last. */
  #include "target-def.h"
@@ -1497,6 +1498,32 @@ gcn_addr_space_convert (rtx op, tree from_type, tree 
to_type)
      gcc_unreachable ();
  }
+/* Implement TARGET_ADDR_SPACE_DEBUG.
+
+   Return the dwarf address space class for each hardware address space.  */
+
+static int
+gcn_addr_space_debug (addr_space_t as)
+{
+  switch (as)
+    {
+      case ADDR_SPACE_DEFAULT:
+      case ADDR_SPACE_FLAT:
+      case ADDR_SPACE_SCALAR_FLAT:
+      case ADDR_SPACE_FLAT_SCRATCH:
+       return DW_ADDR_none;
+      case ADDR_SPACE_GLOBAL:
+       return 1;      // DW_ADDR_LLVM_global
+      case ADDR_SPACE_LDS:
+       return 3;      // DW_ADDR_LLVM_group
+      case ADDR_SPACE_SCRATCH:
+       return 4;      // DW_ADDR_LLVM_private
+      case ADDR_SPACE_GDS:
+       return 0x8000; // DW_ADDR_AMDGPU_region
+    }
+  gcc_unreachable ();
+}
+
/* Implement REGNO_MODE_CODE_OK_FOR_BASE_P via gcn.h @@ -6354,6 +6381,8 @@ gcn_dwarf_register_span (rtx rtl) #undef TARGET_ADDR_SPACE_ADDRESS_MODE
  #define TARGET_ADDR_SPACE_ADDRESS_MODE gcn_addr_space_address_mode
+#undef  TARGET_ADDR_SPACE_DEBUG
+#define TARGET_ADDR_SPACE_DEBUG gcn_addr_space_debug
  #undef  TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P
  #define TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P \
    gcn_addr_space_legitimate_address_p


OK.

Andrew

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