gcc/ChangeLog:
* config/i386/i386.md (<rounding_insn>hf2): New expander.
(sse4_1_round<mode>2): Extend from MODEF to MODEFH.
* config/i386/sse.md (*sse4_1_round<ssescalarmodesuffix>):
Extend from VF_128 to VFH_128.
gcc/testsuite/ChangeLog:
* gcc.target/i386/avx512fp16-builtin-round-1.c: New test.
---
gcc/config/i386/i386.md | 19 ++++++++++--
gcc/config/i386/sse.md | 8 ++---
.../i386/avx512fp16-builtin-round-1.c | 31 +++++++++++++++++++
3 files changed, 51 insertions(+), 7 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-builtin-round-1.c
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 81c893c60de..247a6e489ef 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -17721,9 +17721,9 @@ (define_expand "significand<mode>2"
(define_insn "sse4_1_round<mode>2"
- [(set (match_operand:MODEF 0 "register_operand" "=x,x,x,v,v")
- (unspec:MODEF
- [(match_operand:MODEF 1 "nonimmediate_operand" "0,x,m,v,m")
+ [(set (match_operand:MODEFH 0 "register_operand" "=x,x,x,v,v")
+ (unspec:MODEFH
+ [(match_operand:MODEFH 1 "nonimmediate_operand" "0,x,m,v,m")
(match_operand:SI 2 "const_0_to_15_operand" "n,n,n,n,n")]
UNSPEC_ROUND))]
"TARGET_SSE4_1"
@@ -17980,6 +17980,19 @@ (define_expand "<rounding_insn>xf2"
"TARGET_USE_FANCY_MATH_387
&& (flag_fp_int_builtin_inexact || !flag_trapping_math)")
+(define_expand "<rounding_insn>hf2"
+ [(parallel [(set (match_operand:HF 0 "register_operand")
+ (unspec:HF [(match_operand:HF 1 "register_operand")]
+ FRNDINT_ROUNDING))
+ (clobber (reg:CC FLAGS_REG))])]
+ "TARGET_AVX512FP16"
+{
+ emit_insn (gen_sse4_1_roundhf2
+ (operands[0], operands[1],
+ GEN_INT (ROUND_<ROUNDING> | ROUND_NO_EXC)));
+ DONE;
+})
+
(define_expand "<rounding_insn><mode>2"
[(parallel [(set (match_operand:MODEF 0 "register_operand")
(unspec:MODEF [(match_operand:MODEF 1 "register_operand")]
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index b47e7f0b82a..a76c30c75cb 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -20202,14 +20202,14 @@ (define_insn "sse4_1_round<ssescalarmodesuffix>"
(set_attr "mode" "<MODE>")])
(define_insn "*sse4_1_round<ssescalarmodesuffix>"
- [(set (match_operand:VF_128 0 "register_operand" "=Yr,*x,x,v")
- (vec_merge:VF_128
- (vec_duplicate:VF_128
+ [(set (match_operand:VFH_128 0 "register_operand" "=Yr,*x,x,v")
+ (vec_merge:VFH_128
+ (vec_duplicate:VFH_128
(unspec:<ssescalarmode>
[(match_operand:<ssescalarmode> 2 "nonimmediate_operand"
"Yrm,*xm,xm,vm")
(match_operand:SI 3 "const_0_to_15_operand" "n,n,n,n")]
UNSPEC_ROUND))
- (match_operand:VF_128 1 "register_operand" "0,0,x,v")
+ (match_operand:VFH_128 1 "register_operand" "0,0,x,v")
(const_int 1)))]
"TARGET_SSE4_1"
"@
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-builtin-round-1.c
b/gcc/testsuite/gcc.target/i386/avx512fp16-builtin-round-1.c
new file mode 100644
index 00000000000..3cab1526967
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-builtin-round-1.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-Ofast -mavx512fp16" } */
+
+_Float16
+f1 (_Float16 x)
+{
+ return __builtin_truncf16 (x);
+}
+
+_Float16
+f2 (_Float16 x)
+{
+ return __builtin_floorf16 (x);
+}
+
+_Float16
+f3 (_Float16 x)
+{
+ return __builtin_ceilf16 (x);
+}
+
+_Float16
+f4 (_Float16 x)
+{
+ return __builtin_roundevenf16 (x);
+}
+
+/* { dg-final { scan-assembler-times "vrndscalesh\[
\\t\]+\\\$11\[^\n\r\]*xmm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vrndscalesh\[
\\t\]+\\\$10\[^\n\r\]*xmm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vrndscalesh\[
\\t\]+\\\$9\[^\n\r\]*xmm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vrndscalesh\[
\\t\]+\\\$8\[^\n\r\]*xmm\[0-9\]" 1 } } */
--
2.18.1
