On 2021-07-12, Kito Cheng wrote:
It was undocument before, but it might used in linux kernel for resolve code model issue, so LLVM community suggest we should document that, so that make it become supported/documented/non-internal machine constraints.gcc/ChangeLog: PR target/101275 * config/riscv/constraints.md ("S"): Update description and remove @internal. * doc/md.texi (Machine Constraints): Document the 'S' constraints for RISC-V. --- gcc/config/riscv/constraints.md | 3 +-- gcc/doc/md.texi | 3 +++ 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/gcc/config/riscv/constraints.md b/gcc/config/riscv/constraints.md index 8c15c6c0486..c87d5b796a5 100644 --- a/gcc/config/riscv/constraints.md +++ b/gcc/config/riscv/constraints.md @@ -67,8 +67,7 @@ (define_memory_constraint "A" (match_test "GET_CODE(XEXP(op,0)) == REG"))) (define_constraint "S" - "@internal - A constant call address." + "A constraint that matches an absolute symbolic address." (match_operand 0 "absolute_symbolic_operand")) (define_constraint "U" diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index 00caf3844cc..2d120da96cf 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -3536,6 +3536,9 @@ A 5-bit unsigned immediate for CSR access instructions. @item A An address that is held in a general-purpose register. +@item S +A constraint that matches an absolute symbolic address. + @end table @item RX---@file{config/rx/constraints.md} -- 2.31.1
LGTM
