On Wed, Aug 11, 2021 at 8:36 AM Uros Bizjak <ubiz...@gmail.com> wrote: > > On Tue, Aug 10, 2021 at 2:13 PM liuhongt <hongtao....@intel.com> wrote: > > > > Hi: > > AVX512F supported vscalefs{s,d} which is the same as ldexp except the > > second operand should be floating point. > > Bootstrapped and regtested on x86_64-linux-gnu{-m32,}. > > > > gcc/ChangeLog: > > > > PR target/98309 > > * config/i386/i386.md (ldexp<mode>3): Extend to vscalefs[sd] > > when TARGET_AVX512F and TARGET_SSE_MATH. > > > > gcc/testsuite/ChangeLog: > > > > PR target/98309 > > * gcc.target/i386/pr98309-1.c: New test. > > * gcc.target/i386/pr98309-2.c: New test. > > OK.
Actually, we should introduce a scalar version of avx512f_vmscalef, so we can avoid all subreg conversions with the vector-merge (VM) version, and will also allow memory in operand 2. Please test the attached incremental patch. Uros.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 56b09c566ed..4a8e8fea290 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -125,6 +125,9 @@ UNSPEC_RSQRT UNSPEC_PSADBW + ;; For AVX512F support + UNSPEC_SCALEF + ;; Generic math support UNSPEC_COPYSIGN UNSPEC_XORSIGN @@ -17894,6 +17897,17 @@ DONE; }) +(define_insn "avx512f_scalef<mode>2" + [(set (match_operand:MODEF 0 "register_operand" "=v") + (unspec:MODEF + [(match_operand:MODEF 1 "register_operand" "v") + (match_operand:MODEF 2 "nonimmediate_operand" "vm")] + UNSPEC_SCALEF))] + "TARGET_AVX512F" + "vscalef<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}" + [(set_attr "prefix" "evex") + (set_attr "mode" "<MODE>")]) + (define_expand "ldexpxf3" [(match_operand:XF 0 "register_operand") (match_operand:XF 1 "register_operand") @@ -17924,15 +17938,12 @@ if (TARGET_AVX512F && TARGET_SSE_MATH) { rtx op2 = gen_reg_rtx (<MODE>mode); - emit_insn (gen_floatsi<mode>2 (op2, operands[2])); - operands[0] = lowpart_subreg (<ssevecmodef>mode, operands[0], <MODE>mode); - if (MEM_P (operands[1])) + + if (!nonimmediate_operand (operands[1], <MODE>mode)) operands[1] = force_reg (<MODE>mode, operands[1]); - operands[1] = lowpart_subreg (<ssevecmodef>mode, operands[1], <MODE>mode); - op2 = lowpart_subreg (<ssevecmodef>mode, op2, <MODE>mode); - emit_insn (gen_avx512f_vmscalef<ssevecmodelower> (operands[0], - operands[1], - op2)); + + emit_insn (gen_floatsi<mode>2 (op2, operands[2])); + emit_insn (gen_avx512f_scalef<mode>2 (operands[0], operands[1], op2)); } else { diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 3957c86c3df..9233dfc6150 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -92,7 +92,6 @@ UNSPEC_RCP14 UNSPEC_RSQRT14 UNSPEC_FIXUPIMM - UNSPEC_SCALEF UNSPEC_VTERNLOG UNSPEC_GETEXP UNSPEC_GETMANT