On Wed, Aug 25, 2021 at 2:14 PM Kong, Lingling via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> Hi,
>
> For avx512f_scattersi<VI48F:mode>, mask operand only affect set src, we
> need to refine the pattern to let gcc know mask register also affect the dest.
> So we put mask operand into UNSPEC_VSIBADDR.
>
> Bootstrapped and regression tested on x86_64-linux-gnu{-m32,-m64}.
> Ok for master?
>
> gcc/ChangeLog:
>
> *config/i386/sse.md (<avx512>scattersi<mode>): Add mask operand to
> UNSPEC_VSIBADDR.
> (<avx512>scattersi<mode>): Likewise.
> (*avx512f_scattersi<VI48F:mode>): Merge mask operand
> to set_dest.
> (*avx512f_scatterdi<VI48F:mode>): Likewise
>
> gcc/testsuite/ChangeLog:
>
> *gcc.target/i386/avx512f-pr101472.c: New test.
> *gcc.target/i386/avx512vl-pr101472.c: Ditto.
Please follow GCC Coding Convention ChanLog which is described in
https://gcc.gnu.org/codingconventions.html#ChangeLogs.
- = gen_rtx_UNSPEC (Pmode, gen_rtvec (3, operands[0], operands[2],
- operands[4]), UNSPEC_VSIBADDR);
+ = gen_rtx_UNSPEC (Pmode, gen_rtvec (4, operands[0], operands[2],
+ operands[4], operands[1]),
UNSPEC_VSIBADDR);
Lines shall be at most 80 columns.
})
(define_insn "*avx512f_scattersi<VI48F:mode>"
@@ -24214,10 +24214,11 @@
[(unspec:P
[(match_operand:P 0 "vsib_address_operand" "Tv")
(match_operand:<VEC_GATHER_IDXSI> 2 "register_operand" "v")
- (match_operand:SI 4 "const1248_operand" "n")]
+ (match_operand:SI 4 "const1248_operand" "n")
+ (match_operand:<avx512fmaskmode> 6 "register_operand" "1")]
UNSPEC_VSIBADDR)])
(unspec:VI48F
- [(match_operand:<avx512fmaskmode> 6 "register_operand" "1")
+ [(match_dup 6)
(match_operand:VI48F 3 "register_operand" "v")]
UNSPEC_SCATTER))
(clobber (match_scratch:<avx512fmaskmode> 1 "=&Yk"))]
@@ -24243,8 +24244,8 @@
"TARGET_AVX512F"
{
operands[5]
- = gen_rtx_UNSPEC (Pmode, gen_rtvec (3, operands[0], operands[2],
- operands[4]), UNSPEC_VSIBADDR);
+ = gen_rtx_UNSPEC (Pmode, gen_rtvec (4, operands[0], operands[2],
+ operands[4], operands[1]),
UNSPEC_VSIBADDR);
Ditto.
})
--
BR,
Hongtao
