> The LEON5 can often dual issue instructions from the same 64-bit aligned > double word if there are no data dependencies. Add scheduling information > to avoid scheduling unpairable instructions back-to-back. > > gcc/ChangeLog: > > * config/sparc/sparc-opts.h (enum sparc_processor_type): Add LEON5 > * config/sparc/sparc.c (struct processor_costs): Add LEON5 costs > (leon5_adjust_cost): Increase cost of store with data dependency > on ALU instruction and FPU anti-dependencies. > (sparc_option_override): Add LEON5 costs > (sparc_adjust_cost): Add LEON5 cost adjustments > * config/sparc/sparc.h: Add LEON5 > * config/sparc/sparc.md: Include LEON5 scheduling information > * config/sparc/sparc.opt: Add LEON5 > * doc/invoke.texi: Add LEON5 > * config/sparc/leon5.md: New file.
OK for whatever branches you deem relevant, modulo a couple of nits: > +;; Avoid scheduling load/store, FPU, and multiplication instructions back and multiply instructions > +;; Schedule three instructions between load and dependant instruction. dependent -- Eric Botcazou
