On Thu, Sep 23, 2021 at 6:58 PM Hongtao Liu <crazy...@gmail.com> wrote:
>
> On Fri, Sep 24, 2021 at 9:42 AM H.J. Lu <hjl.to...@gmail.com> wrote:
> >
> > On Thu, Sep 23, 2021 at 6:38 PM Hongtao Liu <crazy...@gmail.com> wrote:
> > >
> > > On Fri, Sep 24, 2021 at 9:20 AM H.J. Lu <hjl.to...@gmail.com> wrote:
> > > >
> > > > On Thu, Sep 23, 2021 at 6:17 PM liuhongt <hongtao....@intel.com> wrote:
> > > > >
> > > > > Updated, mention _Float16 support.
> > > > >
> > > > > ---
> > > > >  htdocs/gcc-12/changes.html | 13 ++++++++++++-
> > > > >  1 file changed, 12 insertions(+), 1 deletion(-)
> > > > >
> > > > > diff --git a/htdocs/gcc-12/changes.html b/htdocs/gcc-12/changes.html
> > > > > index 81f62fe3..f19c6718 100644
> > > > > --- a/htdocs/gcc-12/changes.html
> > > > > +++ b/htdocs/gcc-12/changes.html
> > > > > @@ -165,7 +165,18 @@ a work-in-progress.</p>
> > > > >    </li>
> > > > >  </ul>
> > > > >
> > > > > -<!-- <h3 id="x86">IA-32/x86-64</h3> -->
> > > > > +<h3 id="x86">IA-32/x86-64</h3>
> > > > > +<ul>
> > > > > +  <li>New ISA extension support for Intel AVX512-FP16 was added to 
> > > > > GCC.
> > > > > +      AVX512FP16 intrinsics are available via the 
> > > > > <code>-mavx512fp16</code>
> > > > > +      compiler switch.
> > > > > +  </li>
> > > > > +  <li>For both C and C++, The <code>_Float16</code> type is 
> > > > > supported on
> > > > > +      x86 systems with SSE2 enabled. Without 
> > > > > <code>{-mavx512fp16}</code>,
> > > > > +      <code>_Float16</code> type is storage only, all operations 
> > > > > will be
> > > >
> > > > I don't think _Float16 is storage only without AVX512FP16.
> > > >
> > > I guess you're meaning that psABI is available for _Float16 even w/o
> > > AVX512-FP16.
> > >
> > > How about
> > >
> > > +  <li>For both C and C++, The <code>_Float16</code> type is supported on
> > > +      x86 systems with SSE2 enabled. Without <code>{-mavx512fp16}</code>,
> > > +      no real AVX512-FP16 instructions are generated, all operations 
> > > will be
> >
> > No need for "no real AVX512-FP16 instructions are generated".
> Updated.
>
> -<!-- <h3 id="x86">IA-32/x86-64</h3> -->
> +<h3 id="x86">IA-32/x86-64</h3>
> +<ul>
> +  <li>New ISA extension support for Intel AVX512-FP16 was added to GCC.
> +      AVX512FP16 intrinsics are available via the <code>-mavx512fp16</code>
> +      compiler switch.
> +  </li>
> +  <li>For both C and C++, The <code>_Float16</code> type is supported on
> +      x86 systems with SSE2 enabled. Without <code>{-mavx512fp16}</code>,
> +      all operations will be emulated by software emulation and the
> +      <code>float</code> instructions.
> +  </li>
> +</ul>

LGTM.

Thanks.

> >
> > > +      emulated by software emulation and the <code>float</code> 
> > > instructions.
> > > +  </li>
> > >
> > > > > +      emulated by software emulation and the <code>float</code> 
> > > > > instructions.
> > > > > +  </li>
> > > > > +</ul>
> > > > >
> > > > >  <!-- <h3 id="mips">MIPS</h3> -->
> > > > >
> > > > > --
> > > > > 2.18.1
> > > > >
> > > >
> > > >
> > > > --
> > > > H.J.
> > >
> > >
> > >
> > > --
> > > BR,
> > > Hongtao
> >
> >
> >
> > --
> > H.J.
>
>
>
> --
> BR,
> Hongtao



-- 
H.J.

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