Just a little thing I noticed in one of the recent commits.

Pushed.

---
 htdocs/gcc-12/changes.html | 2 +-
 htdocs/gcc-8/changes.html  | 2 +-
 htdocs/news.html           | 4 ++--
 htdocs/news/sparc.html     | 2 +-
 4 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/htdocs/gcc-12/changes.html b/htdocs/gcc-12/changes.html
index 45e87ea4..4f7bbd33 100644
--- a/htdocs/gcc-12/changes.html
+++ b/htdocs/gcc-12/changes.html
@@ -55,7 +55,7 @@ a work-in-progress.</p>
   </li>
   <li>
     The <code>hppa[12] wwwdocs:*-*-hpux10*</code> and 
<code>hppa[12]*-*-hpux11*</code>
-    configurations targeting 32bit PA-RISC with HP-UX have been obsoleted and
+    configurations targeting 32-bit PA-RISC with HP-UX have been obsoleted and
     will be removed in a future release.
   <li>
     The support for the <code>m32r-*-linux*</code>, 
<code>m32rle-*-linux*</code>,
diff --git a/htdocs/gcc-8/changes.html b/htdocs/gcc-8/changes.html
index d9404170..84f32d3e 100644
--- a/htdocs/gcc-8/changes.html
+++ b/htdocs/gcc-8/changes.html
@@ -300,7 +300,7 @@ f () { /* Do something. */; }</pre></blockquote>
   <li>Fixed illegal addresses generated from address expressions
     which refer only to offset 0.</li>
   <li>Fixed a bug with reg+offset addressing on 32b segments.
-    In 'large' mode, the offset is treated as 32bits unless it's
+    In 'large' mode, the offset is treated as 32-bit unless it's
     in global, read-only or kernarg address space.</li>
   <li>Fixed a crash caused sometimes by calls with more
     than 4 arguments.</li>
diff --git a/htdocs/news.html b/htdocs/news.html
index a4acd823..24eab163 100644
--- a/htdocs/news.html
+++ b/htdocs/news.html
@@ -1559,7 +1559,7 @@ improvement work were and will be of great use.
 <dt><b>September 21, 1999</b></dt>
 <dd>
 Nick Clifton of Cygnus Solutions has donated support for the Fujitsu
-FR30 processor.  The FR30 is a low-cost 32bit cpu intended for larger
+FR30 processor.  The FR30 is a low-cost 32-bit CPU intended for larger
 embedded applications.  It has a simple load/store architecture, 16
 general registers and a variable length instruction set.
 </dd>
@@ -1762,7 +1762,7 @@ are expected in the future.
 <dt><b>January 21, 1999</b></dt>
 <dd>
 Cygnus donates support for the PowerPC
-750 processor.  The PPC750 is a 32bit superscalar implementation of the
+750 processor.  The PPC750 is a 32-bit superscalar implementation of the
 PowerPC family manufactured by both Motorola and IBM.  The PPC750 is targeted
 at high end Macs as well as high end embedded applications.
 </dd>
diff --git a/htdocs/news/sparc.html b/htdocs/news/sparc.html
index fcfb8cfa..4c379a06 100644
--- a/htdocs/news/sparc.html
+++ b/htdocs/news/sparc.html
@@ -138,7 +138,7 @@ improve long term maintainability of the compiler.  Details 
follow.</p>
 3) Full support for nearly all features of the new 64-bit SPARC ELF V9
    ABI.  This includes support for all meaningful code models,
    including MediumLow, MediumMiddle, MediunAny (both old and new for
-   backwards compatibility with older GCC versions), and 32bit.
+   backwards compatibility with older GCC versions), and 32-bit.
 
 4) Tremendously improved support for instruction level parallelism on
    UltraSPARC.  Using some new pieces of infrastructure added to
-- 
2.33.0

Reply via email to