On Thu, Dec 16, 2021 at 5:00 PM Richard Sandiford via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> Obviously I'm not in a position to comment on the target bits, but:
>
> liuhongt via Gcc-patches <gcc-patches@gcc.gnu.org> writes:
> > Also with corresponding target attribute, option default disabled.
> >
> > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
> > Ok for trunk?
> >
> > gcc/ChangeLog:
> >
> > * config/i386/i386-options.c (ix86_target_string): Handle
> > -mvect-compare-costs.
> > (ix86_valid_target_attribute_inner_p): Support target attribute
> > vect-compare-costs.
> > * config/i386/i386.c (ix86_autovectorize_vector_modes): Return
> > 1 when TARGET_X86_VECT_COMPARE_COSTS.
> > * config/i386/i386.opt: Add option -mvect-compare-costs.
> > * doc/invoke.texi: Document -mvect-compare-costs.
> > ---
> > gcc/config/i386/i386-options.c | 7 ++++++-
> > gcc/config/i386/i386.c | 2 +-
> > gcc/config/i386/i386.opt | 5 +++++
> > gcc/doc/invoke.texi | 7 ++++++-
> > 4 files changed, 18 insertions(+), 3 deletions(-)
> >
> > diff --git a/gcc/config/i386/i386-options.c b/gcc/config/i386/i386-options.c
> > index 53bd55a12e3..53794b13fc5 100644
> > --- a/gcc/config/i386/i386-options.c
> > +++ b/gcc/config/i386/i386-options.c
> > @@ -406,7 +406,8 @@ ix86_target_string (HOST_WIDE_INT isa, HOST_WIDE_INT
> > isa2,
> > /* Additional flag options. */
> > static struct ix86_target_opts flag2_opts[] =
> > {
> > - { "-mgeneral-regs-only", OPTION_MASK_GENERAL_REGS_ONLY }
> > + { "-mgeneral-regs-only", OPTION_MASK_GENERAL_REGS_ONLY },
> > + { "-mvect-compare-costs",
> > OPTION_MASK_X86_VECT_COMPARE_COSTS }
> > };
> >
> > const char *opts[ARRAY_SIZE (isa_opts) + ARRAY_SIZE (isa2_opts)
> > @@ -1111,6 +1112,10 @@ ix86_valid_target_attribute_inner_p (tree fndecl,
> > tree args, char *p_strings[],
> > OPT_mgeneral_regs_only,
> > OPTION_MASK_GENERAL_REGS_ONLY),
> >
> > + IX86_ATTR_IX86_YES ("vect-compare-costs",
> > + OPT_mvect_compare_costs,
> > + OPTION_MASK_X86_VECT_COMPARE_COSTS),
> > +
> > IX86_ATTR_YES ("relax-cmpxchg-loop",
> > OPT_mrelax_cmpxchg_loop,
> > MASK_RELAX_CMPXCHG_LOOP),
> > diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
> > index 9f4ed34ffd5..8d3fc3be1b9 100644
> > --- a/gcc/config/i386/i386.c
> > +++ b/gcc/config/i386/i386.c
> > @@ -22836,7 +22836,7 @@ ix86_autovectorize_vector_modes (vector_modes
> > *modes, bool all)
> > if (TARGET_SSE2)
> > modes->safe_push (V4QImode);
> >
> > - return 0;
> > + return TARGET_X86_VECT_COMPARE_COSTS ? 1 : 0;
>
> as far as the interface goes, it'd be better to use VECT_COMPARE_COSTS
> instead of 1 here.
>
Thanks, will change.
> Thanks,
> Richard
>
> > }
> >
> > /* Implemenation of targetm.vectorize.get_mask_mode. */
> > diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt
> > index e1af3e417b0..80c7a073d07 100644
> > --- a/gcc/config/i386/i386.opt
> > +++ b/gcc/config/i386/i386.opt
> > @@ -1206,3 +1206,8 @@ Support MWAIT and MONITOR built-in functions and code
> > generation.
> > mavx512fp16
> > Target Mask(ISA2_AVX512FP16) Var(ix86_isa_flags2) Save
> > Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F
> > and AVX512FP16 built-in functions and code generation.
> > +
> > +mvect-compare-costs
> > +Target Mask(X86_VECT_COMPARE_COSTS) Var(ix86_target_flags) Save
> > +Tells the loop vectorizer to try all the provided vector lengths and pick
> > the
> > +one with the lowest cost.
> > diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
> > index 80c36b9abe0..fa2f63af65f 100644
> > --- a/gcc/doc/invoke.texi
> > +++ b/gcc/doc/invoke.texi
> > @@ -1428,7 +1428,7 @@ See RS/6000 and PowerPC Options.
> > -malign-data=@var{type} -mstack-protector-guard=@var{guard} @gol
> > -mstack-protector-guard-reg=@var{reg} @gol
> > -mstack-protector-guard-offset=@var{offset} @gol
> > --mstack-protector-guard-symbol=@var{symbol} @gol
> > +-mstack-protector-guard-symbol=@var{symbol} -mvect-compare-costs@gol
> > -mgeneral-regs-only -mcall-ms2sysv-xlogues -mrelax-cmpxchg-loop @gol
> > -mindirect-branch=@var{choice} -mfunction-return=@var{choice} @gol
> > -mindirect-branch-register -mharden-sls=@var{choice} @gol
> > @@ -32440,6 +32440,11 @@ Generate code that uses only the general-purpose
> > registers. This
> > prevents the compiler from using floating-point, vector, mask and bound
> > registers.
> >
> > +@item -mvect-compare-costs
> > +@opindex mcompare-vect-costs
> > +Tells the loop vectorizer to try all the vector lengths and pick the one
> > +with the lowest cost.
> > +
> > @item -mrelax-cmpxchg-loop
> > @opindex mrelax-cmpxchg-loop
> > Relax cmpxchg loop by emitting an early load and compare before cmpxchg,
--
BR,
Hongtao
