On Mon, Dec 20, 2021 at 6:53 AM Jakub Jelinek <ja...@redhat.com> wrote:
>
> On Sun, Dec 19, 2021 at 12:06:30PM -0800, H.J. Lu via Gcc-patches wrote:
> > --- a/gcc/config/i386/predicates.md
> > +++ b/gcc/config/i386/predicates.md
> > @@ -1199,6 +1199,12 @@
> >    (and (match_operand 0 "memory_operand")
> >         (not (match_test "x86_extended_reg_mentioned_p (op)"))))
> >
> > +;; Return true if OP is a memory operand representable on ix86.
> > +(define_predicate "ix86_memory_operand"
> > +  (and (match_operand 0 "memory_operand")
> > +       (ior (match_test "mode == QImode || mode == HImode")
> > +         (match_operand 0 "x86_64_general_operand"))))
>
> I must be missing something, but how can this work?
> x86_64_general_operand is:
> (define_predicate "x86_64_general_operand"
>   (if_then_else (match_test "TARGET_64BIT")
>     (ior (match_operand 0 "nonimmediate_operand")
>          (match_operand 0 "x86_64_immediate_operand"))
>     (match_operand 0 "general_operand")))
> and so for non-immediates like MEMs it is just a normal memory_operand.
>
>         Jakub
>

The problem is in

(define_memory_constraint "TARGET_MEM_CONSTRAINT"
  "Matches any valid memory."
  (and (match_code "mem")
       (match_test "memory_address_addr_space_p (GET_MODE (op), XEXP (op, 0),
                                                 MEM_ADDR_SPACE (op))")))

define_register_constraint allows LRA to convert the operand to the form
'(mem (reg X))', where X is a base register.  I am testing the v2 patch with

;; NB: Similar to 'm', but don't use define_memory_constraint on x86-64
;; to prevent LRA from converting the operand to the form '(mem (reg X))'
;; where X is a base register.
(define_constraint "BM"
  "@internal x86-64 memory operand."
  (and (match_code "mem")
       (match_test "memory_address_addr_space_p (GET_MODE (op), XEXP (op, 0),
                                                 MEM_ADDR_SPACE (op))")))

;; Memory operand constraint for word modes.
(define_mode_attr m [(QI "m") (HI "m") (SI "BM") (DI "BM")])

-- 
H.J.

Reply via email to