Avoid ICE of move pattern from memory to memory.
Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
Pushed to trunk.
gcc/ChangeLog:
PR target/103895
* config/i386/sse.md (*bit_and_float_vector_all_ones):
Force_reg operand 1 to avoid ICE.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr103895.c: New test.
---
gcc/config/i386/sse.md | 3 ++-
gcc/testsuite/gcc.target/i386/pr103895.c | 16 ++++++++++++++++
2 files changed, 18 insertions(+), 1 deletion(-)
create mode 100644 gcc/testsuite/gcc.target/i386/pr103895.c
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 033b60d9aa2..fa1d56ae3e3 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -4750,7 +4750,8 @@ (define_insn_and_split "*bit_and_float_vector_all_ones"
"TARGET_SSE && ix86_pre_reload_split ()"
"#"
"&& 1"
- [(set (match_dup 0) (match_dup 1))])
+ [(set (match_dup 0) (match_dup 1))]
+ "operands[1] = force_reg (<MODE>mode, operands[1]);")
(define_expand "copysign<mode>3"
[(set (match_dup 4)
diff --git a/gcc/testsuite/gcc.target/i386/pr103895.c
b/gcc/testsuite/gcc.target/i386/pr103895.c
new file mode 100644
index 00000000000..40b827806e7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr103895.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-Og -ffloat-store" } */
+
+#include <emmintrin.h>
+typedef float vFloat __attribute__((__vector_size__(16)));
+float bar_dr;
+vFloat bar_f1;
+void bar() {
+ static vFloat m0;
+ vFloat fa1 = _mm_andnot_ps(m0, bar_f1);
+ __attribute__((__vector_size__(2 * sizeof(double)))) double v3 =
+ _mm_cvtps_pd(fa1);
+ vFloat r1 = _mm_cvtpd_ps(v3);
+ _mm_storeu_ps(&bar_dr, r1);
+}
+
--
2.18.1
