On Thu, Jan 13, 2022 at 7:40 AM Kewen.Lin <li...@linux.ibm.com> wrote:
>
> Hi David,
>
> on 2022/1/13 上午11:12, David Edelsohn wrote:
> > On Wed, Jan 12, 2022 at 8:56 PM Kewen.Lin <li...@linux.ibm.com> wrote:
> >>
> >> Hi,
> >>
> >> This patch is to clean up some codes with GET_MODE_UNIT_SIZE or
> >> GET_MODE_NUNITS, which can use known constant instead.
> >
> > I'll let Segher decide, but often the additional code is useful
> > self-documentation instead of magic constants. Or at least the change
> > requires comments documenting the derivation of the constants
> > currently described by the code itself.
> >
>
> Thanks for the comments, I added some comments as suggested, also removed
> the whole "altivec_vreveti2" since I noticed it's useless, it's not used
> by any built-in functions and even unused in the commit db042e1603db50573.
>
> The updated version has been tested as before.
As we have discussed offline, the comments need to be clarified and expanded.
And the removal of altivec_vreveti2 should be confirmed with Carl
Love, who added the pattern less than a year ago. There may be another
patch planning to use it.
Thanks, David
>
> BR,
> Kewen
> -----
> gcc/ChangeLog:
>
> * config/rs6000/altivec.md (altivec_vreveti2): Remove.
> * config/rs6000/vsx.md (*vsx_extract_si,
> *vsx_extract_si_<uns>float_df,
> *vsx_extract_si_<uns>float_<mode>, *vsx_insert_extract_v4sf_p9): Use
> known constant values to simplify code.
> ---
> gcc/config/rs6000/altivec.md | 25 -------------------------
> gcc/config/rs6000/vsx.md | 12 ++++++++----
> 2 files changed, 8 insertions(+), 29 deletions(-)
>
> diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
> index c2312cc1e0f..b7f056f8c60 100644
> --- a/gcc/config/rs6000/altivec.md
> +++ b/gcc/config/rs6000/altivec.md
> @@ -3950,31 +3950,6 @@ (define_expand "altivec_negv4sf2"
> DONE;
> })
>
> -;; Vector reverse elements
> -(define_expand "altivec_vreveti2"
> - [(set (match_operand:TI 0 "register_operand" "=v")
> - (unspec:TI [(match_operand:TI 1 "register_operand" "v")]
> - UNSPEC_VREVEV))]
> - "TARGET_ALTIVEC"
> -{
> - int i, j, size, num_elements;
> - rtvec v = rtvec_alloc (16);
> - rtx mask = gen_reg_rtx (V16QImode);
> -
> - size = GET_MODE_UNIT_SIZE (TImode);
> - num_elements = GET_MODE_NUNITS (TImode);
> -
> - for (j = 0; j < num_elements; j++)
> - for (i = 0; i < size; i++)
> - RTVEC_ELT (v, i + j * size)
> - = GEN_INT (i + (num_elements - 1 - j) * size);
> -
> - emit_insn (gen_vec_initv16qiqi (mask, gen_rtx_PARALLEL (V16QImode, v)));
> - emit_insn (gen_altivec_vperm_ti (operands[0], operands[1],
> - operands[1], mask));
> - DONE;
> -})
> -
> ;; Vector reverse elements for V16QI V8HI V4SI V4SF
> (define_expand "altivec_vreve<mode>2"
> [(set (match_operand:VEC_K 0 "register_operand" "=v")
> diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
> index 802db0d112b..d246410880d 100644
> --- a/gcc/config/rs6000/vsx.md
> +++ b/gcc/config/rs6000/vsx.md
> @@ -3854,8 +3854,9 @@ (define_insn_and_split "*vsx_extract_si"
> rtx vec_tmp = operands[3];
> int value;
>
> + /* Adjust index for LE element ordering. */
> if (!BYTES_BIG_ENDIAN)
> - element = GEN_INT (GET_MODE_NUNITS (V4SImode) - 1 - INTVAL (element));
> + element = GEN_INT (3 - INTVAL (element));
>
> /* If the value is in the correct position, we can avoid doing the VSPLT<x>
> instruction. */
> @@ -4230,8 +4231,9 @@ (define_insn_and_split "*vsx_extract_si_<uns>float_df"
> rtx v4si_tmp = operands[3];
> int value;
>
> + /* Adjust index for LE element ordering. */
> if (!BYTES_BIG_ENDIAN)
> - element = GEN_INT (GET_MODE_NUNITS (V4SImode) - 1 - INTVAL (element));
> + element = GEN_INT (3 - INTVAL (element));
>
> /* If the value is in the correct position, we can avoid doing the VSPLT<x>
> instruction. */
> @@ -4273,8 +4275,9 @@ (define_insn_and_split
> "*vsx_extract_si_<uns>float_<mode>"
> rtx df_tmp = operands[4];
> int value;
>
> + /* Adjust index for LE element ordering. */
> if (!BYTES_BIG_ENDIAN)
> - element = GEN_INT (GET_MODE_NUNITS (V4SImode) - 1 - INTVAL (element));
> + element = GEN_INT (3 - INTVAL (element));
>
> /* If the value is in the correct position, we can avoid doing the VSPLT<x>
> instruction. */
> @@ -4466,8 +4469,9 @@ (define_insn "*vsx_insert_extract_v4sf_p9"
> {
> int ele = INTVAL (operands[4]);
>
> + /* Adjust index for LE element ordering. */
> if (!BYTES_BIG_ENDIAN)
> - ele = GET_MODE_NUNITS (V4SFmode) - 1 - ele;
> + ele = 3 - ele;
>
> operands[4] = GEN_INT (GET_MODE_SIZE (SFmode) * ele);
> return "xxinsertw %x0,%x2,%4";
> --
> 2.27.0
>
