While there is practically impossible that input registers are matched
with in-out register, better mark the output operand of the split alternative
as earlyclobbered - we do output early to the output operand when
the insn is split.
2022-01-14 Uroš Bizjak <ubiz...@gmail.com>
gcc/ChangeLog:
* config/i386/i386.md (*add<mode>_1_slp"):
Mark alternative 1 output operand earlyclobbered.
(*sub<mode>_1_slp): Ditto.
(*and<mode>_1_slp): Ditto.
(*<code><mode>_1_slp): Ditto.
(*neg<mode>_1_slp): Ditto.
(*one_cmpl<mode>_1_slp): Ditto.
(*ashl<mode>3_1_slp): Ditto.
(*<insn><mode>3_1_slp): Ditto.
(*<insn><mode>3_1_slp): Ditto.
Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.
Pushed to master.
Uros.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index c2acb1dbd90..bd965df79df 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -5902,7 +5902,7 @@
;; Alternative 1 is needed to work around LRA limitation, see PR82524.
(define_insn_and_split "*add<mode>_1_slp"
- [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>,<r>"))
+ [(set (strict_low_part (match_operand:SWI12 0 "register_operand"
"+<r>,&<r>"))
(plus:SWI12 (match_operand:SWI12 1 "nonimmediate_operand" "%0,!<r>")
(match_operand:SWI12 2 "general_operand" "<r>mn,<r>mn")))
(clobber (reg:CC FLAGS_REG))]
@@ -6856,7 +6856,7 @@
;; Alternative 1 is needed to work around LRA limitation, see PR82524.
(define_insn_and_split "*sub<mode>_1_slp"
- [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>,<r>"))
+ [(set (strict_low_part (match_operand:SWI12 0 "register_operand"
"+<r>,&<r>"))
(minus:SWI12 (match_operand:SWI12 1 "register_operand" "0,!<r>")
(match_operand:SWI12 2 "general_operand" "<r>mn,<r>mn")))
(clobber (reg:CC FLAGS_REG))]
@@ -9905,7 +9905,7 @@
;; Alternative 1 is needed to work around LRA limitation, see PR82524.
(define_insn_and_split "*and<mode>_1_slp"
- [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>,<r>"))
+ [(set (strict_low_part (match_operand:SWI12 0 "register_operand"
"+<r>,&<r>"))
(and:SWI12 (match_operand:SWI12 1 "nonimmediate_operand" "%0,!<r>")
(match_operand:SWI12 2 "general_operand" "<r>mn,<r>mn")))
(clobber (reg:CC FLAGS_REG))]
@@ -10543,7 +10543,7 @@
;; Alternative 1 is needed to work around LRA limitation, see PR82524.
(define_insn_and_split "*<code><mode>_1_slp"
- [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>,<r>"))
+ [(set (strict_low_part (match_operand:SWI12 0 "register_operand"
"+<r>,&<r>"))
(any_or:SWI12 (match_operand:SWI12 1 "nonimmediate_operand" "%0,!<r>")
(match_operand:SWI12 2 "general_operand" "<r>mn,<r>mn")))
(clobber (reg:CC FLAGS_REG))]
@@ -10897,7 +10897,7 @@
;; Alternative 1 is needed to work around LRA limitation, see PR82524.
(define_insn_and_split "*neg<mode>_1_slp"
- [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>,<r>"))
+ [(set (strict_low_part (match_operand:SWI12 0 "register_operand"
"+<r>,&<r>"))
(neg:SWI12 (match_operand:SWI12 1 "register_operand" "0,!<r>")))
(clobber (reg:CC FLAGS_REG))]
"!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)"
@@ -11490,7 +11490,7 @@
;; Alternative 1 is needed to work around LRA limitation, see PR82524.
(define_insn_and_split "*one_cmpl<mode>_1_slp"
- [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>,<r>"))
+ [(set (strict_low_part (match_operand:SWI12 0 "register_operand"
"+<r>,&<r>"))
(not:SWI12 (match_operand:SWI12 1 "register_operand" "0,!<r>")))]
"!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)"
"@
@@ -12186,7 +12186,7 @@
;; Alternative 1 is needed to work around LRA limitation, see PR82524.
(define_insn_and_split "*ashl<mode>3_1_slp"
- [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>,<r>"))
+ [(set (strict_low_part (match_operand:SWI12 0 "register_operand"
"+<r>,&<r>"))
(ashift:SWI12 (match_operand:SWI12 1 "register_operand" "0,!<r>")
(match_operand:QI 2 "nonmemory_operand" "cI,cI")))
(clobber (reg:CC FLAGS_REG))]
@@ -13063,7 +13063,7 @@
;; Alternative 1 is needed to work around LRA limitation, see PR82524.
(define_insn_and_split "*<insn><mode>3_1_slp"
- [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>,<r>"))
+ [(set (strict_low_part (match_operand:SWI12 0 "register_operand"
"+<r>,&<r>"))
(any_shiftrt:SWI12 (match_operand:SWI12 1 "register_operand" "0,!<r>")
(match_operand:QI 2 "nonmemory_operand" "cI,cI")))
(clobber (reg:CC FLAGS_REG))]
@@ -13607,7 +13607,7 @@
;; Alternative 1 is needed to work around LRA limitation, see PR82524.
(define_insn_and_split "*<insn><mode>3_1_slp"
- [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>,<r>"))
+ [(set (strict_low_part (match_operand:SWI12 0 "register_operand"
"+<r>,&<r>"))
(any_rotate:SWI12 (match_operand:SWI12 1 "register_operand" "0,!<r>")
(match_operand:QI 2 "nonmemory_operand" "cI,cI")))
(clobber (reg:CC FLAGS_REG))]
