Hi!
I observed recently that a couple of Power10 instructions and built-in functions
were somehow not implemented. This patch adds one of them (vmsumcud). Although
this isn't normally stage-4 material, this is really simple and carries no
discernible risk, so I hope it can be considered.
Bootstrapped and tested on powerpc64le-linux-gnu with no regressions. Is this
okay for trunk?
Thanks!
Bill
2022-02-07 Bill Schmidt <wschm...@linux.ibm.com>
gcc/
* config/rs6000/rs6000-builtins.def (VMSUMCUD): New.
* config/rs6000/rs6000-overload.def (VEC_MSUMC): New.
* config/rs6000/vsx.md (UNSPEC_VMSUMCUD): New constant.
(vmsumcud): New define_insn.
gcc/testsuite/
* gcc.target/powerpc/vec-msumc.c: New test.
---
gcc/config/rs6000/rs6000-builtins.def | 3 ++
gcc/config/rs6000/rs6000-overload.def | 4 ++
gcc/config/rs6000/vsx.md | 13 +++++++
gcc/testsuite/gcc.target/powerpc/vec-msumc.c | 39 ++++++++++++++++++++
4 files changed, 59 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/powerpc/vec-msumc.c
diff --git a/gcc/config/rs6000/rs6000-builtins.def
b/gcc/config/rs6000/rs6000-builtins.def
index d0ea54d77e4..846c0bafd45 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -3497,6 +3497,9 @@
const signed int __builtin_altivec_vstrihr_p (vss);
VSTRIHR_P vstrir_p_v8hi {}
+ const vuq __builtin_vsx_vmsumcud (vull, vull, vuq);
+ VMSUMCUD vmsumcud {}
+
const signed int __builtin_vsx_xvtlsbb_all_ones (vsc);
XVTLSBB_ONES xvtlsbbo {}
diff --git a/gcc/config/rs6000/rs6000-overload.def
b/gcc/config/rs6000/rs6000-overload.def
index 5e38d597722..44e2945aaa0 100644
--- a/gcc/config/rs6000/rs6000-overload.def
+++ b/gcc/config/rs6000/rs6000-overload.def
@@ -2456,6 +2456,10 @@
vuq __builtin_vec_msum (vull, vull, vuq);
VMSUMUDM VMSUMUDM_U
+[VEC_MSUMC, vec_msumc, __builtin_vec_msumc]
+ vuq __builtin_vec_msumc (vull, vull, vuq);
+ VMSUMCUD
+
[VEC_MSUMS, vec_msums, __builtin_vec_msums]
vui __builtin_vec_msums (vus, vus, vui);
VMSUMUHS
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 88053f11e29..e4904102526 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -372,6 +372,7 @@ (define_c_enum "unspec"
UNSPEC_REPLACE_UN
UNSPEC_VDIVES
UNSPEC_VDIVEU
+ UNSPEC_VMSUMCUD
UNSPEC_XXEVAL
UNSPEC_XXSPLTIW
UNSPEC_XXSPLTIDP
@@ -6615,3 +6616,15 @@ (define_split
emit_move_insn (operands[0], tmp4);
DONE;
})
+
+;; vmsumcud
+(define_insn "vmsumcud"
+[(set (match_operand:V1TI 0 "register_operand" "+v")
+ (unspec:V1TI [(match_operand:V2DI 1 "register_operand" "v")
+ (match_operand:V2DI 2 "register_operand" "v")
+ (match_operand:V1TI 3 "register_operand" "v")]
+ UNSPEC_VMSUMCUD))]
+ "TARGET_POWER10"
+ "vmsumcud %0,%1,%2,%3"
+ [(set_attr "type" "vecsimple")]
+)
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-msumc.c
b/gcc/testsuite/gcc.target/powerpc/vec-msumc.c
new file mode 100644
index 00000000000..524a2225c6c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-msumc.c
@@ -0,0 +1,39 @@
+/* { dg-do run { target { power10_hw } } } */
+/* { dg-require-effective-target power10_ok } */
+/* { dg-options "-mdejagnu-cpu=power10 -O2" } */
+#include <altivec.h>
+
+#define DEBUG 0
+
+#if DEBUG
+#include <stdio.h>
+#endif
+
+extern void abort (void);
+
+int
+main ()
+{
+ vector unsigned long long arg1, arg2;
+ vector unsigned __int128 arg3, result, expected;
+ unsigned __int128 c = (unsigned __int128) (-1); /* 2^128 - 1 */
+
+ arg1 = (vector unsigned long long) { 111ULL, 300ULL };
+ arg2 = (vector unsigned long long) { 700ULL, 222ULL };
+ arg3 = (vector unsigned __int128) { c };
+ expected = (vector unsigned __int128) { 1 };
+
+ result = vec_msumc (arg1, arg2, arg3);
+ if (result[0] != expected[0])
+ {
+#if DEBUG
+ printf ("ERROR, expected %d, result %d\n",
+ (unsigned int) expected[0],
+ (unsigned int) result[0]);
+#else
+ abort ();
+#endif
+ }
+
+ return 0;
+}
--
2.27.0
