[PATCH] i386: Fix vec_unpacks_float_lo_v4si operand constraint [PR104469]

[Uros Bizjak via Gcc-patches]

2022-02-10  Uroš Bizjak  <ubiz...@gmail.com>

gcc/ChangeLog:

    PR target/104469
    * config/i386/sse.md (vec_unpacks_float_lo_v4si):
    Change operand 1 constraint to register_operand.

gcc/testsuite/ChangeLog:

    PR target/104469
    * gcc.target/i386/pr104469.c: New test.

Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

Pushed to master and release branches.

Uros.

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 36b35f68349..b2f56345c65 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -9223,7 +9223,7 @@ (define_expand "vec_unpacks_float_lo_v4si"
 (define_expand "vec_unpacks_float_hi_v8si"
   [(set (match_dup 2)
        (vec_select:V4SI
-         (match_operand:V8SI 1 "vector_operand")
+         (match_operand:V8SI 1 "register_operand")
          (parallel [(const_int 4) (const_int 5)
                     (const_int 6) (const_int 7)])))
    (set (match_operand:V4DF 0 "register_operand")
diff --git a/gcc/testsuite/gcc.target/i386/pr104469.c 
b/gcc/testsuite/gcc.target/i386/pr104469.c
new file mode 100644
index 00000000000..39cc31fde1f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr104469.c
@@ -0,0 +1,12 @@
+/* PR target/104469 */
+/* { dg-do compile } */
+/* { dg-options "-mavx512f" } */
+
+typedef double __attribute__((__vector_size__ (64))) F;
+typedef int __attribute__((__vector_size__ (32))) V;
+
+F
+foo (V v)
+{
+  return __builtin_convertvector (v, F);
+}