Hi!
This is a backport from mainline 3f30f2d1dbb3228b8468b26239fe60c2974ce2ac.
These built-ins were misimplemented as always having big-endian semantics.
Because the built-in infrastructure has changed, the modifications to the
source are different but achieve the same purpose. The modifications to
the test suite are identical (after fixing the issue with -mbig that David
pointed out with the original patch).
Bootstrapped and tested on powerpc64le-linux-gnu with no regressions.
Is this okay for releases/gcc-11?
Thanks!
Bill
2022-02-10 Bill Schmidt <wschm...@linux.ibm.com>
gcc/
PR target/95082
* config/rs6000/rs6000-builtin.def (VCLZLSBB_V16QI): Change default
pattern.
(VCLZLSBB_V8HI): Likewise.
(VCLZLSBB_V4SI): Likewise.
(VCTZLSBB_V16QI): Likewise.
(VCTZLSBB_V8HI): Likewise.
(VCTZLSBB_V4SI): Likewise.
* config/rs6000/rs6000-call.c (rs6000_expand_builtin): Make big-endian
adjustments to P9V_BUILTIN_VC[LT]ZLSBB_* built-in expansions.
gcc/testsuite/
PR target/95082
* gcc.target/powerpc/vsu/vec-cntlz-lsbb-0.c: Restrict to big-endian.
* gcc.target/powerpc/vsu/vec-cntlz-lsbb-1.c: Likewise.
* gcc.target/powerpc/vsu/vec-cntlz-lsbb-3.c: New.
* gcc.target/powerpc/vsu/vec-cntlz-lsbb-4.c: New.
* gcc.target/powerpc/vsu/vec-cnttz-lsbb-0.c: Restrict to big-endian.
* gcc.target/powerpc/vsu/vec-cnttz-lsbb-1.c: Likewise.
* gcc.target/powerpc/vsu/vec-cnttz-lsbb-3.c: New.
* gcc.target/powerpc/vsu/vec-cnttz-lsbb-4.c: New.
---
gcc/config/rs6000/rs6000-builtin.def | 12 ++++----
gcc/config/rs6000/rs6000-call.c | 30 +++++++++++++++++++
.../gcc.target/powerpc/vsu/vec-cntlz-lsbb-0.c | 1 +
.../gcc.target/powerpc/vsu/vec-cntlz-lsbb-1.c | 1 +
.../gcc.target/powerpc/vsu/vec-cntlz-lsbb-3.c | 15 ++++++++++
.../gcc.target/powerpc/vsu/vec-cntlz-lsbb-4.c | 15 ++++++++++
.../gcc.target/powerpc/vsu/vec-cnttz-lsbb-0.c | 1 +
.../gcc.target/powerpc/vsu/vec-cnttz-lsbb-1.c | 1 +
.../gcc.target/powerpc/vsu/vec-cnttz-lsbb-3.c | 15 ++++++++++
.../gcc.target/powerpc/vsu/vec-cnttz-lsbb-4.c | 15 ++++++++++
10 files changed, 100 insertions(+), 6 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/powerpc/vsu/vec-cntlz-lsbb-3.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/vsu/vec-cntlz-lsbb-4.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/vsu/vec-cnttz-lsbb-3.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/vsu/vec-cnttz-lsbb-4.c
diff --git a/gcc/config/rs6000/rs6000-builtin.def
b/gcc/config/rs6000/rs6000-builtin.def
index 6270444ef70..b28ee02070a 100644
--- a/gcc/config/rs6000/rs6000-builtin.def
+++ b/gcc/config/rs6000/rs6000-builtin.def
@@ -2678,12 +2678,12 @@ BU_P9V_64BIT_AV_X (STXVL, "stxvl", MISC)
BU_P9V_64BIT_AV_X (XST_LEN_R, "xst_len_r", MISC)
/* 1 argument vector functions added in ISA 3.0 (power9). */
-BU_P9V_AV_1 (VCLZLSBB_V16QI, "vclzlsbb_v16qi", CONST, vclzlsbb_v16qi)
-BU_P9V_AV_1 (VCLZLSBB_V8HI, "vclzlsbb_v8hi", CONST, vclzlsbb_v8hi)
-BU_P9V_AV_1 (VCLZLSBB_V4SI, "vclzlsbb_v4si", CONST, vclzlsbb_v4si)
-BU_P9V_AV_1 (VCTZLSBB_V16QI, "vctzlsbb_v16qi", CONST, vctzlsbb_v16qi)
-BU_P9V_AV_1 (VCTZLSBB_V8HI, "vctzlsbb_v8hi", CONST, vctzlsbb_v8hi)
-BU_P9V_AV_1 (VCTZLSBB_V4SI, "vctzlsbb_v4si", CONST, vctzlsbb_v4si)
+BU_P9V_AV_1 (VCLZLSBB_V16QI, "vclzlsbb_v16qi", CONST, vctzlsbb_v16qi)
+BU_P9V_AV_1 (VCLZLSBB_V8HI, "vclzlsbb_v8hi", CONST, vctzlsbb_v8hi)
+BU_P9V_AV_1 (VCLZLSBB_V4SI, "vclzlsbb_v4si", CONST, vctzlsbb_v4si)
+BU_P9V_AV_1 (VCTZLSBB_V16QI, "vctzlsbb_v16qi", CONST, vclzlsbb_v16qi)
+BU_P9V_AV_1 (VCTZLSBB_V8HI, "vctzlsbb_v8hi", CONST, vclzlsbb_v8hi)
+BU_P9V_AV_1 (VCTZLSBB_V4SI, "vctzlsbb_v4si", CONST, vclzlsbb_v4si)
/* Built-in support for Power9 "VSU option" string operations includes
new awareness of the "vector compare not equal" (vcmpneb, vcmpneb.,
diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c
index ef20cb30388..27bb25fa4d8 100644
--- a/gcc/config/rs6000/rs6000-call.c
+++ b/gcc/config/rs6000/rs6000-call.c
@@ -13221,6 +13221,36 @@ rs6000_expand_builtin (tree exp, rtx target, rtx
subtarget ATTRIBUTE_UNUSED,
}
break;
+ case P9V_BUILTIN_VCLZLSBB_V16QI:
+ if (BYTES_BIG_ENDIAN)
+ icode = CODE_FOR_vclzlsbb_v16qi;
+ break;
+
+ case P9V_BUILTIN_VCLZLSBB_V8HI:
+ if (BYTES_BIG_ENDIAN)
+ icode = CODE_FOR_vclzlsbb_v8hi;
+ break;
+
+ case P9V_BUILTIN_VCLZLSBB_V4SI:
+ if (BYTES_BIG_ENDIAN)
+ icode = CODE_FOR_vclzlsbb_v4si;
+ break;
+
+ case P9V_BUILTIN_VCTZLSBB_V16QI:
+ if (BYTES_BIG_ENDIAN)
+ icode = CODE_FOR_vctzlsbb_v16qi;
+ break;
+
+ case P9V_BUILTIN_VCTZLSBB_V8HI:
+ if (BYTES_BIG_ENDIAN)
+ icode = CODE_FOR_vctzlsbb_v8hi;
+ break;
+
+ case P9V_BUILTIN_VCTZLSBB_V4SI:
+ if (BYTES_BIG_ENDIAN)
+ icode = CODE_FOR_vctzlsbb_v4si;
+ break;
+
default:
break;
}
diff --git a/gcc/testsuite/gcc.target/powerpc/vsu/vec-cntlz-lsbb-0.c
b/gcc/testsuite/gcc.target/powerpc/vsu/vec-cntlz-lsbb-0.c
index 0faf233425e..e2f6b08bc0f 100644
--- a/gcc/testsuite/gcc.target/powerpc/vsu/vec-cntlz-lsbb-0.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsu/vec-cntlz-lsbb-0.c
@@ -1,6 +1,7 @@
/* { dg-do compile { target { powerpc*-*-* } } } */
/* { dg-require-effective-target powerpc_p9vector_ok } */
/* { dg-options "-mdejagnu-cpu=power9" } */
+/* { dg-additional-options "-mbig" { target powerpc64le-*-* } } */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/vsu/vec-cntlz-lsbb-1.c
b/gcc/testsuite/gcc.target/powerpc/vsu/vec-cntlz-lsbb-1.c
index 201ed17e2fd..a9647e749ae 100644
--- a/gcc/testsuite/gcc.target/powerpc/vsu/vec-cntlz-lsbb-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsu/vec-cntlz-lsbb-1.c
@@ -1,6 +1,7 @@
/* { dg-do compile { target { powerpc*-*-* } } } */
/* { dg-require-effective-target powerpc_p9vector_ok } */
/* { dg-options "-mdejagnu-cpu=power9" } */
+/* { dg-additional-options "-mbig" { target powerpc64le-*-* } } */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/vsu/vec-cntlz-lsbb-3.c
b/gcc/testsuite/gcc.target/powerpc/vsu/vec-cntlz-lsbb-3.c
new file mode 100644
index 00000000000..6ee31a11aee
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vsu/vec-cntlz-lsbb-3.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-options "-mdejagnu-cpu=power9 -mlittle" } */
+
+#include <altivec.h>
+
+int
+count_leading_zero_byte_bits (vector signed char *arg1_p)
+{
+ vector signed char arg_1 = *arg1_p;
+
+ return vec_cntlz_lsbb (arg_1);
+}
+
+/* { dg-final { scan-assembler "vctzlsbb" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vsu/vec-cntlz-lsbb-4.c
b/gcc/testsuite/gcc.target/powerpc/vsu/vec-cntlz-lsbb-4.c
new file mode 100644
index 00000000000..6105091b016
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vsu/vec-cntlz-lsbb-4.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-options "-mdejagnu-cpu=power9 -mlittle" } */
+
+#include <altivec.h>
+
+int
+count_leading_zero_byte_bits (vector unsigned char *arg1_p)
+{
+ vector unsigned char arg_1 = *arg1_p;
+
+ return vec_cntlz_lsbb (arg_1);
+}
+
+/* { dg-final { scan-assembler "vctzlsbb" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vsu/vec-cnttz-lsbb-0.c
b/gcc/testsuite/gcc.target/powerpc/vsu/vec-cnttz-lsbb-0.c
index 70a398ac401..7ee2b6e87db 100644
--- a/gcc/testsuite/gcc.target/powerpc/vsu/vec-cnttz-lsbb-0.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsu/vec-cnttz-lsbb-0.c
@@ -1,6 +1,7 @@
/* { dg-do compile { target { powerpc*-*-* } } } */
/* { dg-require-effective-target powerpc_p9vector_ok } */
/* { dg-options "-mdejagnu-cpu=power9" } */
+/* { dg-additional-options "-mbig" { target powerpc64le-*-* } } */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/vsu/vec-cnttz-lsbb-1.c
b/gcc/testsuite/gcc.target/powerpc/vsu/vec-cnttz-lsbb-1.c
index f6d41e3e728..d87a7903fce 100644
--- a/gcc/testsuite/gcc.target/powerpc/vsu/vec-cnttz-lsbb-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsu/vec-cnttz-lsbb-1.c
@@ -1,6 +1,7 @@
/* { dg-do compile { target { powerpc*-*-* } } } */
/* { dg-require-effective-target powerpc_p9vector_ok } */
/* { dg-options "-mdejagnu-cpu=power9" } */
+/* { dg-additional-options "-mbig" { target powerpc64le-*-* } } */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/vsu/vec-cnttz-lsbb-3.c
b/gcc/testsuite/gcc.target/powerpc/vsu/vec-cnttz-lsbb-3.c
new file mode 100644
index 00000000000..a9245d8200c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vsu/vec-cnttz-lsbb-3.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-options "-mdejagnu-cpu=power9 -mlittle" } */
+
+#include <altivec.h>
+
+int
+count_trailing_zero_byte_bits (vector signed char *arg1_p)
+{
+ vector signed char arg_1 = *arg1_p;
+
+ return vec_cnttz_lsbb (arg_1);
+}
+
+/* { dg-final { scan-assembler "vclzlsbb" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vsu/vec-cnttz-lsbb-4.c
b/gcc/testsuite/gcc.target/powerpc/vsu/vec-cnttz-lsbb-4.c
new file mode 100644
index 00000000000..71fea5306c1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vsu/vec-cnttz-lsbb-4.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-options "-mdejagnu-cpu=power9 -mlittle" } */
+
+#include <altivec.h>
+
+int
+count_trailing_zero_byte_bits (vector unsigned char *arg1_p)
+{
+ vector unsigned char arg_1 = *arg1_p;
+
+ return vec_cnttz_lsbb (arg_1);
+}
+
+/* { dg-final { scan-assembler "vclzlsbb" } } */
--
2.27.0
