Hi,
some tests expect a convert instruction but nowadays the conversion is
already done at compile time. This results in a literal-pool load.
Change the tests accordingly.
OK for trunk?
Regards
Robin
gcc/testsuite/ChangeLog:
* gcc.target/s390/zvector/vec-double-compile.c: Expect vl
instead of vc*.
* gcc.target/s390/zvector/vec-float-compile.c: Dito.
* gcc.target/s390/zvector/vec-signed-compile.c: Dito.
* gcc.target/s390/zvector/vec-unsigned-compile.c: Dito.
---
diff --git a/gcc/testsuite/gcc.target/s390/zvector/vec-double-compile.c
b/gcc/testsuite/gcc.target/s390/zvector/vec-double-compile.c
index 0a70b095b88..24a49474e38 100644
--- a/gcc/testsuite/gcc.target/s390/zvector/vec-double-compile.c
+++ b/gcc/testsuite/gcc.target/s390/zvector/vec-double-compile.c
@@ -31,6 +31,11 @@ vcdlgb_mem (vector unsigned long long *a)
return vec_double (*a);
}
+/* Since r12-4475-g247c407c83f001 the following immediates are being
+ converted and directly stored in the literal pool so no explicit
+ conversion is necessary. */
+/* { dg-final { scan-assembler-times
"vl\t%v\[0-9\]+,\.L\[0-9\]+\-\.L\[0-9\]+\\(%r\[0-9\]+\\)" 2 } } */
+
vector double
vcdgb_imm ()
{
@@ -43,5 +48,5 @@ vcdlgb_imm ()
return vec_double ((vector unsigned long long){ 1, 2 });
}
-/* { dg-final { scan-assembler-times "vcdgb\t" 3 } } */
-/* { dg-final { scan-assembler-times "vcdlgb\t" 3 } } */
+/* { dg-final { scan-assembler-times "vcdgb\t" 2 } } */
+/* { dg-final { scan-assembler-times "vcdlgb\t" 2 } } */
diff --git a/gcc/testsuite/gcc.target/s390/zvector/vec-float-compile.c
b/gcc/testsuite/gcc.target/s390/zvector/vec-float-compile.c
index a591e23872e..bf5cebb34f5 100644
--- a/gcc/testsuite/gcc.target/s390/zvector/vec-float-compile.c
+++ b/gcc/testsuite/gcc.target/s390/zvector/vec-float-compile.c
@@ -31,6 +31,11 @@ vcelfb_mem (vector unsigned int *a)
return vec_float (*a);
}
+/* Since r12-4475-g247c407c83f001 the following immediates are being
+ converted and directly stored in the literal pool so no explicit
+ conversion is necessary. */
+/* { dg-final { scan-assembler-times
"vl\t%v\[0-9\]+,\.L\[0-9\]+\-\.L\[0-9\]+\\(%r\[0-9\]+\\)" 2 } } */
+
vector float
vcefb_imm ()
{
@@ -43,5 +48,5 @@ vcelfb_imm ()
return vec_float ((vector unsigned int){ 1, 2 });
}
-/* { dg-final { scan-assembler-times "vcefb\t" 3 } } */
-/* { dg-final { scan-assembler-times "vcelfb\t" 3 } } */
+/* { dg-final { scan-assembler-times "vcefb\t" 2 } } */
+/* { dg-final { scan-assembler-times "vcelfb\t" 2 } } */
diff --git a/gcc/testsuite/gcc.target/s390/zvector/vec-signed-compile.c
b/gcc/testsuite/gcc.target/s390/zvector/vec-signed-compile.c
index 9814cc5d74d..1d30ba3a9ad 100644
--- a/gcc/testsuite/gcc.target/s390/zvector/vec-signed-compile.c
+++ b/gcc/testsuite/gcc.target/s390/zvector/vec-signed-compile.c
@@ -31,6 +31,11 @@ vcgdb_mem (vector double *a)
return vec_signed (*a);
}
+/* Since r12-4475-g247c407c83f001 the following immediates are being
+ converted and directly stored in the literal pool so no explicit
+ conversion is necessary. */
+/* { dg-final { scan-assembler-times
"vl\t%v\[0-9\]+,\.L\[0-9\]+\-\.L\[0-9\]+\\(%r\[0-9\]+\\)" 2 } } */
+
vector signed int
vcfeb_imm ()
{
@@ -43,5 +48,5 @@ vcgdb_imm ()
return vec_signed ((vector double){ 1.0, 2.0 });
}
-/* { dg-final { scan-assembler-times "vcfeb\t" 3 } } */
-/* { dg-final { scan-assembler-times "vcgdb\t" 3 } } */
+/* { dg-final { scan-assembler-times "vcfeb\t" 2 } } */
+/* { dg-final { scan-assembler-times "vcgdb\t" 2 } } */
diff --git
a/gcc/testsuite/gcc.target/s390/zvector/vec-unsigned-compile.c
b/gcc/testsuite/gcc.target/s390/zvector/vec-unsigned-compile.c
index 1eed284adff..90347e618c1 100644
--- a/gcc/testsuite/gcc.target/s390/zvector/vec-unsigned-compile.c
+++ b/gcc/testsuite/gcc.target/s390/zvector/vec-unsigned-compile.c
@@ -31,6 +31,11 @@ vclgdb_mem (vector double *a)
return vec_unsigned (*a);
}
+/* Since r12-4475-g247c407c83f001 the following immediates are being
+ converted and directly stored in the literal pool so no explicit
+ conversion is necessary. */
+/* { dg-final { scan-assembler-times
"vl\t%v\[0-9\]+,\.L\[0-9\]+\-\.L\[0-9\]+\\(%r\[0-9\]+\\)" 2 } } */
+
vector unsigned int
vclfeb_imm ()
{
@@ -43,5 +48,5 @@ vclgdb_imm ()
return vec_unsigned ((vector double){ 1.0, 2.0 });
}
-/* { dg-final { scan-assembler-times "vclfeb\t" 3 } } */
-/* { dg-final { scan-assembler-times "vclgdb\t" 3 } } */
+/* { dg-final { scan-assembler-times "vclfeb\t" 2 } } */
+/* { dg-final { scan-assembler-times "vclgdb\t" 2 } } */
--
2.35.1
