Constraint "f" is always exactly the same as constraint "d", so we do
not need RS6000_CONSTRAINT_f.
2022-05-11 Segher Boessenkool <seg...@kernel.crashing.org>
* config/rs6000/constraints.md (register_constraint "f"): Use
RS6000_CONSTRAINT_d.
* config/rs6000/rs6000.cc (rs6000_debug_reg_global): Do not handle
RS6000_CONSTRAINT_f.
(rs6000_init_hard_regno_mode_ok): Ditto. Reorder and simplify a bit.
* config/rs6000/rs6000.h (r6000_reg_class_enum): Delete
RS6000_CONSTRAINT_d.
---
gcc/config/rs6000/constraints.md | 2 +-
gcc/config/rs6000/rs6000.cc | 16 +++-------------
gcc/config/rs6000/rs6000.h | 3 +--
3 files changed, 5 insertions(+), 16 deletions(-)
diff --git a/gcc/config/rs6000/constraints.md b/gcc/config/rs6000/constraints.md
index 7aaffd9f9a89..00ac4b86c058 100644
--- a/gcc/config/rs6000/constraints.md
+++ b/gcc/config/rs6000/constraints.md
@@ -29,7 +29,7 @@ (define_register_constraint "b" "BASE_REGS"
"A base register. Like @code{r}, but @code{r0} is not allowed, so
@code{r1}@dots{}@code{r31}.")
-(define_register_constraint "f" "rs6000_constraints[RS6000_CONSTRAINT_f]"
+(define_register_constraint "f" "rs6000_constraints[RS6000_CONSTRAINT_d]"
"A floating point register (FPR), @code{f0}@dots{}@code{f31}.")
(define_register_constraint "d" "rs6000_constraints[RS6000_CONSTRAINT_d]"
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 4030864aa1af..5cb8a53e9ce6 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -2305,7 +2305,6 @@ rs6000_debug_reg_global (void)
fprintf (stderr,
"\n"
"d reg_class = %s\n"
- "f reg_class = %s\n"
"v reg_class = %s\n"
"wa reg_class = %s\n"
"we reg_class = %s\n"
@@ -2314,7 +2313,6 @@ rs6000_debug_reg_global (void)
"wA reg_class = %s\n"
"\n",
reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_d]],
- reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_f]],
reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_v]],
reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wa]],
reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_we]],
@@ -2953,7 +2951,6 @@ rs6000_init_hard_regno_mode_ok (bool global_init_p)
constraints are:
d - Register class to use with traditional DFmode instructions.
- f - Register class to use with traditional SFmode instructions.
v - Altivec register.
wa - Any VSX register.
wc - Reserved to represent individual CR bits (used in LLVM).
@@ -2962,18 +2959,11 @@ rs6000_init_hard_regno_mode_ok (bool global_init_p)
wx - Float register if we can do 32-bit int stores. */
if (TARGET_HARD_FLOAT)
- {
- rs6000_constraints[RS6000_CONSTRAINT_f] = FLOAT_REGS; /* SFmode */
- rs6000_constraints[RS6000_CONSTRAINT_d] = FLOAT_REGS; /* DFmode */
- }
-
- if (TARGET_VSX)
- rs6000_constraints[RS6000_CONSTRAINT_wa] = VSX_REGS;
-
- /* Add conditional constraints based on various options, to allow us to
- collapse multiple insn patterns. */
+ rs6000_constraints[RS6000_CONSTRAINT_d] = FLOAT_REGS;
if (TARGET_ALTIVEC)
rs6000_constraints[RS6000_CONSTRAINT_v] = ALTIVEC_REGS;
+ if (TARGET_VSX)
+ rs6000_constraints[RS6000_CONSTRAINT_wa] = VSX_REGS;
if (TARGET_POWERPC64)
{
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 523256a5c9d5..20b9d11424db 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -1240,8 +1240,7 @@ extern enum reg_class
rs6000_regno_regclass[FIRST_PSEUDO_REGISTER];
/* Register classes for various constraints that are based on the target
switches. */
enum r6000_reg_class_enum {
- RS6000_CONSTRAINT_d, /* fpr registers for double values */
- RS6000_CONSTRAINT_f, /* fpr registers for single values */
+ RS6000_CONSTRAINT_d, /* FPR registers */
RS6000_CONSTRAINT_v, /* Altivec registers */
RS6000_CONSTRAINT_wa, /* Any VSX register */
RS6000_CONSTRAINT_we, /* VSX register if ISA 3.0 vector. */
--
1.8.3.1
