Re: [PATCH] Clamp vec_perm_expr index in simplify_bitfield_ref to avoid ICE.

[Richard Biener via Gcc-patches]

On Mon, 16 May 2022, liuhongt wrote:

> Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}
> Ok for trunk?

OK.

Thanks,
Richard.

> gcc/ChangeLog:
> 
>       PR tree-optimization/105591
>       * tree-ssa-forwprop.cc (simplify_bitfield_ref): Clamp
>       vec_perm_expr index.
> 
> gcc/testsuite/ChangeLog:
> 
>       * gcc.dg/pr105591.c: New test.
> ---
>  gcc/testsuite/gcc.dg/pr105591.c | 12 ++++++++++++
>  gcc/tree-ssa-forwprop.cc        | 13 ++++++++-----
>  2 files changed, 20 insertions(+), 5 deletions(-)
>  create mode 100644 gcc/testsuite/gcc.dg/pr105591.c
> 
> diff --git a/gcc/testsuite/gcc.dg/pr105591.c b/gcc/testsuite/gcc.dg/pr105591.c
> new file mode 100644
> index 00000000000..9554c42e2f4
> --- /dev/null
> +++ b/gcc/testsuite/gcc.dg/pr105591.c
> @@ -0,0 +1,12 @@
> +/* { dg-do compile } */
> +/* { dg-options "-Wno-psabi -O" } */
> +/* { dg-additional-options "-mavx" { target x86_64-*-* i?86-*-* } } */
> +typedef unsigned long long __attribute__((__vector_size__ (16))) U;
> +typedef unsigned long long __attribute__((__vector_size__ (32))) V;
> +
> +V
> +foo (U u)
> +{
> +  U x = __builtin_shuffle (u, (U) { 0xBE2ED0AB630B33FE });
> +  return __builtin_shufflevector (u, x, 2, 1, 0, 3);
> +}
> diff --git a/gcc/tree-ssa-forwprop.cc b/gcc/tree-ssa-forwprop.cc
> index 48cab5844e0..7da3f80af10 100644
> --- a/gcc/tree-ssa-forwprop.cc
> +++ b/gcc/tree-ssa-forwprop.cc
> @@ -2381,23 +2381,26 @@ simplify_bitfield_ref (gimple_stmt_iterator *gsi)
>  
>    /* One element.  */
>    if (known_eq (size, elem_size))
> -    idx = TREE_INT_CST_LOW (VECTOR_CST_ELT (m, idx));
> +    idx = TREE_INT_CST_LOW (VECTOR_CST_ELT (m, idx)) % (2 * nelts);
>    else
>      {
>        unsigned HOST_WIDE_INT nelts_op;
>        if (!constant_multiple_p (size, elem_size, &nelts_op)
>         || !pow2p_hwi (nelts_op))
>       return false;
> -      unsigned start = TREE_INT_CST_LOW (vector_cst_elt (m, idx));
> -      unsigned end = TREE_INT_CST_LOW (vector_cst_elt (m, idx + nelts_op - 
> 1));
> +      /* Clamp vec_perm_expr index.  */
> +      unsigned start = TREE_INT_CST_LOW (vector_cst_elt (m, idx)) % (2 * 
> nelts);
> +      unsigned end = TREE_INT_CST_LOW (vector_cst_elt (m, idx + nelts_op - 
> 1))
> +                  % (2 * nelts);
>        /* Be in the same vector.  */
>        if ((start < nelts) != (end < nelts))
>       return false;
>        for (unsigned HOST_WIDE_INT i = 1; i != nelts_op; i++)
>       {
>         /* Continuous area.  */
> -       if (TREE_INT_CST_LOW (vector_cst_elt (m, idx + i)) - 1
> -           != TREE_INT_CST_LOW (vector_cst_elt (m, idx + i - 1)))
> +       if (TREE_INT_CST_LOW (vector_cst_elt (m, idx + i)) % (2 * nelts) - 1
> +           != TREE_INT_CST_LOW (vector_cst_elt (m, idx + i - 1))
> +              % (2 * nelts))
>           return false;
>       }
>        /* Alignment not worse than before.  */
> 

-- 
Richard Biener <rguent...@suse.de>
SUSE Software Solutions Germany GmbH, Maxfeldstrasse 5, 90409 Nuernberg,
Germany; GF: Ivo Totev, Andrew Myers, Andrew McDonald, Boudien Moerman;
HRB 36809 (AG Nuernberg)