On Tue, Mar 20, 2012 at 10:54 AM, Uros Bizjak <ubiz...@gmail.com> wrote: > On Tue, Mar 20, 2012 at 4:52 PM, H.J. Lu <hjl.to...@gmail.com> wrote: > >>>> Yeah, my bootstrap just failed the same. Will test: >>>> >>>> 2012-03-20 Jakub Jelinek <ja...@redhat.com> >>>> >>>> * config/i386/i386.c (ix86_decompose_address) <case ZERO_EXTEND>: >>>> If operand isn't UNSPEC, return 0. >>> >>> Committed as obvious now that bootstrap/regtest finished on x86_64-linux >>> and i686-linux. >>> >>>> --- gcc/config/i386/i386.c.jj 2012-03-20 09:35:06.000000000 +0100 >>>> +++ gcc/config/i386/i386.c 2012-03-20 09:56:35.038835835 +0100 >>>> @@ -11516,6 +11516,8 @@ ix86_decompose_address (rtx addr, struct >>>> >>>> case ZERO_EXTEND: >>>> op = XEXP (op, 0); >>>> + if (GET_CODE (op) != UNSPEC) >>>> + return 0; >>>> /* FALLTHRU */ >>>> >>>> case UNSPEC: >>> >> >> Uros, >> >> I think use the OS provided instruction to load TP into DImode register >> could simplify the code. > > Which OS provided instruction? > > Please see how TP is defined in get_thread_pointer, it is in ptr_mode: > > rtx tp = gen_rtx_UNSPEC (ptr_mode, gen_rtvec (1, const0_rtx), UNSPEC_TP); > > This says that TP is in SImode on X32. > > Uros.
TP is defined as (unspec:DI [(const_int 0]) UNSPEC_TP) and provided by OS. It is a CONST_INT, but its value is opaque to GCC. MODE here has no impact on its value provided by OS. X32 OS provides instructions to load TP to into an SImode and DImode registers. -- H.J.
