Hi Suwa-san,
On Fri, Jun 10, 2022 at 8:28 AM Takayuki 'January June' Suwa
<jjsuwa_sys3...@yahoo.co.jp> wrote:
>
> This patch revises the previous implementation of constant synthesis.
>
> First, changed to use define_split machine description pattern and to run
> after reload pass, in order not to interfere some optimizations such as
> the loop invariant motion.
>
> Second, not only integer but floating-point is subject to processing.
>
> Third, several new synthesis patterns - when the constant cannot fit into
> a "MOVI Ax, simm12" instruction, but:
>
> I. can be represented as a power of two minus one (eg. 32767, 65535 or
> 0x7fffffffUL)
> => "MOVI(.N) Ax, -1" + "SRLI Ax, Ax, 1 ... 31" (or "EXTUI")
> II. is between -34816 and 34559
> => "MOVI(.N) Ax, -2048 ... 2047" + "ADDMI Ax, Ax, -32768 ... 32512"
> III. (existing case) can fit into a signed 12-bit if the trailing zero bits
> are stripped
> => "MOVI(.N) Ax, -2048 ... 2047" + "SLLI Ax, Ax, 1 ... 31"
>
> The above sequences consist of 5 or 6 bytes and have latency of 2 clock
> cycles,
> in contrast with "L32R Ax, <litpool>" (3 bytes and one clock latency,
> but may
> suffer additional one clock pipeline stall and implementation-specific
> InstRAM/ROM access penalty) plus 4 bytes of constant value.
>
> In addition, 3-instructions synthesis patterns (8 or 9 bytes, 3 clock
> latency)
> are also provided when optimizing for speed and L32R instruction has
> considerable access penalty:
>
> IV. 2-instructions synthesis (any of I ... III) followed by
> "SLLI Ax, Ax, 1 ... 31"
> V. 2-instructions synthesis followed by either "ADDX[248] Ax, Ax, Ax"
> or "SUBX8 Ax, Ax, Ax" (multiplying by 3, 5, 7 or 9)
>
> gcc/ChangeLog:
>
> * config/xtensa/xtensa-protos.h (xtensa_constantsynth):
> New prototype.
> * config/xtensa/xtensa.cc (xtensa_emit_constantsynth,
> xtensa_constantsynth_2insn, xtensa_constantsynth_rtx_SLLI,
> xtensa_constantsynth_rtx_ADDSUBX, xtensa_constantsynth):
> New backend functions that process the abovementioned logic.
> (xtensa_emit_move_sequence): Revert the previous changes.
> * config/xtensa/xtensa.md: New split patterns for integer
> and floating-point, as the frontend part.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/xtensa/constsynth_2insns.c: New.
> * gcc.target/xtensa/constsynth_3insns.c: Ditto.
> * gcc.target/xtensa/constsynth_double.c: Ditto.
> ---
> gcc/config/xtensa/xtensa-protos.h | 1 +
> gcc/config/xtensa/xtensa.cc | 133 +++++++++++++++---
> gcc/config/xtensa/xtensa.md | 50 +++++++
> .../gcc.target/xtensa/constsynth_2insns.c | 44 ++++++
> .../gcc.target/xtensa/constsynth_3insns.c | 24 ++++
> .../gcc.target/xtensa/constsynth_double.c | 11 ++
> 6 files changed, 247 insertions(+), 16 deletions(-)
> create mode 100644 gcc/testsuite/gcc.target/xtensa/constsynth_2insns.c
> create mode 100644 gcc/testsuite/gcc.target/xtensa/constsynth_3insns.c
> create mode 100644 gcc/testsuite/gcc.target/xtensa/constsynth_double.c
this change results in a bunch of ICEs in the tests like this:
during RTL pass: split2
gcc/gcc/testsuite/gcc.c-torture/compile/20120727-1.c: In function 'f':
gcc/gcc/testsuite/gcc.c-torture/compile/20120727-1.c:13:1: internal
compiler error: in gen_split_5, at config/xtensa/xtensa.md:1186
0x7b6fdb gen_split_5(rtx_insn*, rtx_def**)
gcc/gcc/config/xtensa/xtensa.md:1186
0xa8f927 try_split(rtx_def*, rtx_insn*, int)
gcc/gcc/emit-rtl.cc:3795
0xde5fe9 split_insn
gcc/gcc/recog.cc:3384
0xdecde7 split_all_insns()
gcc/gcc/recog.cc:3488
0xdecea8 execute
gcc/gcc/recog.cc:4406
--
Thanks.
-- Max
