On Mon, Mar 26, 2012 at 7:47 AM, H.J. Lu <hjl.to...@gmail.com> wrote: > On Mon, Mar 26, 2012 at 4:53 AM, Joseph S. Myers > <jos...@codesourcery.com> wrote: >> On Sun, 25 Mar 2012, H.J. Lu wrote: >> >>> Hi Joseph, >>> >>> I need to support InverseMask(XXX) in options without the corresponding >>> Mask(XXX) since XXX is never set directly via a command line option. This >>> patch adds a MaskNeeded property which turns InverseMask(XXX) into >>> the inverse version of Mask(XXX), which allocates a unique bit and defines >>> the same set of macros as Mask(XXX). Does it look OK? >> >> I'd have thought that either Mask or InverseMask with a given mask name >> (or a standalone target mask record) should cause allocation (only once, >> no matter how many options use the same mask name), and MaskExists should >> be removed, rather than adding MaskNeeded - if I understood correctly the >> purpose for which you are adding MaskNeeded. >> > > That is correct. I will work on a patch to remove MaskExists. >
Here is a patch to remove MaskExists. The difference between the old options.h and the new options.h on Linux/x86-64 are --- /tmp/options.h 2012-03-26 09:49:09.590137047 -0700 +++ ./options.h 2012-03-26 10:07:56.940168938 -0700 @@ -3677,55 +3677,55 @@ extern void cl_target_option_print (FILE #endif #define MASK_128BIT_LONG_DOUBLE (1 << 0) -#define OPTION_MASK_ISA_3DNOW (HOST_WIDE_INT_1 << 0) -#define OPTION_MASK_ISA_3DNOW_A (HOST_WIDE_INT_1 << 1) -#define OPTION_MASK_ISA_64BIT (HOST_WIDE_INT_1 << 2) +#define OPTION_MASK_ISA_64BIT (HOST_WIDE_INT_1 << 0) +#define OPTION_MASK_ISA_3DNOW (HOST_WIDE_INT_1 << 1) +#define OPTION_MASK_ISA_3DNOW_A (HOST_WIDE_INT_1 << 2) #define MASK_80387 (1 << 1) #define MASK_USE_8BIT_IDIV (1 << 2) #define OPTION_MASK_ISA_ABM (HOST_WIDE_INT_1 << 3) #define MASK_ACCUMULATE_OUTGOING_ARGS (1 << 3) #define OPTION_MASK_ISA_AES (HOST_WIDE_INT_1 << 4) #define MASK_ALIGN_DOUBLE (1 << 4) +#define MASK_NO_ALIGN_STRINGOPS (1 << 5) #define OPTION_MASK_ANDROID (1 << 0) #define OPTION_MASK_ISA_AVX (HOST_WIDE_INT_1 << 5) #define OPTION_MASK_ISA_AVX2 (HOST_WIDE_INT_1 << 6) -#define MASK_AVX256_SPLIT_UNALIGNED_LOAD (1 << 5) -#define MASK_AVX256_SPLIT_UNALIGNED_STORE (1 << 6) +#define MASK_AVX256_SPLIT_UNALIGNED_LOAD (1 << 6) +#define MASK_AVX256_SPLIT_UNALIGNED_STORE (1 << 7) #define OPTION_MASK_ISA_BMI (HOST_WIDE_INT_1 << 7) #define OPTION_MASK_ISA_BMI2 (HOST_WIDE_INT_1 << 8) -#define MASK_CLD (1 << 7) +#define MASK_CLD (1 << 8) #define OPTION_MASK_ISA_CRC32 (HOST_WIDE_INT_1 << 9) #define OPTION_MASK_ISA_CX16 (HOST_WIDE_INT_1 << 10) #define OPTION_MASK_ISA_F16C (HOST_WIDE_INT_1 << 11) +#define MASK_NO_FANCY_MATH_387 (1 << 9) #define OPTION_MASK_ISA_FMA (HOST_WIDE_INT_1 << 12) #define OPTION_MASK_ISA_FMA4 (HOST_WIDE_INT_1 << 13) -#define MASK_FLOAT_RETURNS (1 << 8) +#define MASK_FLOAT_RETURNS (1 << 10) #define OPTION_MASK_ISA_FSGSBASE (HOST_WIDE_INT_1 << 14) -#define MASK_IEEE_FP (1 << 9) -#define MASK_INLINE_ALL_STRINGOPS (1 << 10) -#define MASK_INLINE_STRINGOPS_DYNAMICALLY (1 << 11) +#define MASK_IEEE_FP (1 << 11) +#define MASK_INLINE_ALL_STRINGOPS (1 << 12) +#define MASK_INLINE_STRINGOPS_DYNAMICALLY (1 << 13) #define OPTION_MASK_ISA_LWP (HOST_WIDE_INT_1 << 15) #define OPTION_MASK_ISA_LZCNT (HOST_WIDE_INT_1 << 16) #define OPTION_MASK_ISA_MMX (HOST_WIDE_INT_1 << 17) #define OPTION_MASK_ISA_MOVBE (HOST_WIDE_INT_1 << 18) -#define MASK_MS_BITFIELD_LAYOUT (1 << 12) -#define MASK_NO_ALIGN_STRINGOPS (1 << 13) -#define MASK_NO_FANCY_MATH_387 (1 << 14) +#define MASK_MS_BITFIELD_LAYOUT (1 << 14) #define MASK_NO_PUSH_ARGS (1 << 15) #define MASK_NO_RED_ZONE (1 << 16) +#define OPTION_MASK_ISA_SSE4_1 (HOST_WIDE_INT_1 << 19) #define MASK_OMIT_LEAF_FRAME_POINTER (1 << 17) -#define OPTION_MASK_ISA_PCLMUL (HOST_WIDE_INT_1 << 19) -#define OPTION_MASK_ISA_POPCNT (HOST_WIDE_INT_1 << 20) +#define OPTION_MASK_ISA_PCLMUL (HOST_WIDE_INT_1 << 20) +#define OPTION_MASK_ISA_POPCNT (HOST_WIDE_INT_1 << 21) #define MASK_PREFER_AVX128 (1 << 18) -#define OPTION_MASK_ISA_RDRND (HOST_WIDE_INT_1 << 21) +#define OPTION_MASK_ISA_RDRND (HOST_WIDE_INT_1 << 22) #define MASK_RECIP (1 << 19) #define MASK_RTD (1 << 20) -#define OPTION_MASK_ISA_RTM (HOST_WIDE_INT_1 << 22) -#define OPTION_MASK_ISA_SAHF (HOST_WIDE_INT_1 << 23) -#define OPTION_MASK_ISA_SSE (HOST_WIDE_INT_1 << 24) -#define OPTION_MASK_ISA_SSE2 (HOST_WIDE_INT_1 << 25) -#define OPTION_MASK_ISA_SSE3 (HOST_WIDE_INT_1 << 26) -#define OPTION_MASK_ISA_SSE4_1 (HOST_WIDE_INT_1 << 27) +#define OPTION_MASK_ISA_RTM (HOST_WIDE_INT_1 << 23) +#define OPTION_MASK_ISA_SAHF (HOST_WIDE_INT_1 << 24) +#define OPTION_MASK_ISA_SSE (HOST_WIDE_INT_1 << 25) +#define OPTION_MASK_ISA_SSE2 (HOST_WIDE_INT_1 << 26) +#define OPTION_MASK_ISA_SSE3 (HOST_WIDE_INT_1 << 27) #define OPTION_MASK_ISA_SSE4_2 (HOST_WIDE_INT_1 << 28) #define OPTION_MASK_ISA_SSE4A (HOST_WIDE_INT_1 << 29) #define MASK_SSEREGPARM (1 << 21) @@ -3742,15 +3742,16 @@ extern void cl_target_option_print (FILE #endif #define TARGET_128BIT_LONG_DOUBLE ((target_flags & MASK_128BIT_LONG_DOUBLE) != 0) +#define OPTION_ISA_64BIT ((ix86_isa_flags & OPTION_MASK_ISA_64BIT) != 0) #define OPTION_ISA_3DNOW ((ix86_isa_flags & OPTION_MASK_ISA_3DNOW) != 0) #define OPTION_ISA_3DNOW_A ((ix86_isa_flags & OPTION_MASK_ISA_3DNOW_A) != 0) -#define OPTION_ISA_64BIT ((ix86_isa_flags & OPTION_MASK_ISA_64BIT) != 0) #define TARGET_80387 ((target_flags & MASK_80387) != 0) #define TARGET_USE_8BIT_IDIV ((target_flags & MASK_USE_8BIT_IDIV) != 0) #define OPTION_ISA_ABM ((ix86_isa_flags & OPTION_MASK_ISA_ABM) != 0) #define TARGET_ACCUMULATE_OUTGOING_ARGS ((target_flags & MASK_ACCUMULATE_OUTGOING_ARGS) != 0) #define OPTION_ISA_AES ((ix86_isa_flags & OPTION_MASK_ISA_AES) != 0) #define TARGET_ALIGN_DOUBLE ((target_flags & MASK_ALIGN_DOUBLE) != 0) +#define TARGET_NO_ALIGN_STRINGOPS ((target_flags & MASK_NO_ALIGN_STRINGOPS) != 0) #define OPTION_ANDROID ((flag_android & OPTION_MASK_ANDROID) != 0) #define OPTION_ISA_AVX ((ix86_isa_flags & OPTION_MASK_ISA_AVX) != 0) #define OPTION_ISA_AVX2 ((ix86_isa_flags & OPTION_MASK_ISA_AVX2) != 0) @@ -3762,6 +3763,7 @@ extern void cl_target_option_print (FILE #define OPTION_ISA_CRC32 ((ix86_isa_flags & OPTION_MASK_ISA_CRC32) != 0) #define OPTION_ISA_CX16 ((ix86_isa_flags & OPTION_MASK_ISA_CX16) != 0) #define OPTION_ISA_F16C ((ix86_isa_flags & OPTION_MASK_ISA_F16C) != 0) +#define TARGET_NO_FANCY_MATH_387 ((target_flags & MASK_NO_FANCY_MATH_387) != 0) #define OPTION_ISA_FMA ((ix86_isa_flags & OPTION_MASK_ISA_FMA) != 0) #define OPTION_ISA_FMA4 ((ix86_isa_flags & OPTION_MASK_ISA_FMA4) != 0) #define TARGET_FLOAT_RETURNS ((target_flags & MASK_FLOAT_RETURNS) != 0) @@ -3774,10 +3776,9 @@ extern void cl_target_option_print (FILE #define OPTION_ISA_MMX ((ix86_isa_flags & OPTION_MASK_ISA_MMX) != 0) #define OPTION_ISA_MOVBE ((ix86_isa_flags & OPTION_MASK_ISA_MOVBE) != 0) #define TARGET_MS_BITFIELD_LAYOUT ((target_flags & MASK_MS_BITFIELD_LAYOUT) != 0) -#define TARGET_NO_ALIGN_STRINGOPS ((target_flags & MASK_NO_ALIGN_STRINGOPS) != 0) -#define TARGET_NO_FANCY_MATH_387 ((target_flags & MASK_NO_FANCY_MATH_387) != 0) #define TARGET_NO_PUSH_ARGS ((target_flags & MASK_NO_PUSH_ARGS) != 0) #define TARGET_NO_RED_ZONE ((target_flags & MASK_NO_RED_ZONE) != 0) +#define OPTION_ISA_SSE4_1 ((ix86_isa_flags & OPTION_MASK_ISA_SSE4_1) != 0) #define TARGET_OMIT_LEAF_FRAME_POINTER ((target_flags & MASK_OMIT_LEAF_FRAME_POINTER) != 0) #define OPTION_ISA_PCLMUL ((ix86_isa_flags & OPTION_MASK_ISA_PCLMUL) != 0) #define OPTION_ISA_POPCNT ((ix86_isa_flags & OPTION_MASK_ISA_POPCNT) != 0) @@ -3790,7 +3791,6 @@ extern void cl_target_option_print (FILE #define OPTION_ISA_SSE ((ix86_isa_flags & OPTION_MASK_ISA_SSE) != 0) #define OPTION_ISA_SSE2 ((ix86_isa_flags & OPTION_MASK_ISA_SSE2) != 0) #define OPTION_ISA_SSE3 ((ix86_isa_flags & OPTION_MASK_ISA_SSE3) != 0) -#define OPTION_ISA_SSE4_1 ((ix86_isa_flags & OPTION_MASK_ISA_SSE4_1) != 0) #define OPTION_ISA_SSE4_2 ((ix86_isa_flags & OPTION_MASK_ISA_SSE4_2) != 0) #define OPTION_ISA_SSE4A ((ix86_isa_flags & OPTION_MASK_ISA_SSE4A) != 0) #define TARGET_SSEREGPARM ((target_flags & MASK_SSEREGPARM) != 0) The same set of macros are provided. The only differences are the order of bits used and macro definitions. I am doing a full bootstrap and test on Linux/x86-64. OK for trunk if there are no regressions? I will submit a separate patch to remove MaskExists from all *.opt files after this patch is installed. Thanks. -- H.J. ---- 2012-03-26 H.J. Lu <hongjiu...@intel.com> * opth-gen.awk: Allocated a bit for Mask and InverseMask if it hasn't been allocated. Define a target macro for Mask and InverseMask if it hasn't been defined. Remove MaskExists handling. * doc/options.texi: Remove MaskNeeded.
2012-03-26 H.J. Lu <hongjiu...@intel.com> * opth-gen.awk: Allocated a bit for Mask and InverseMask if it hasn't been allocated. Define a target macro for Mask and InverseMask if it hasn't been defined. Remove MaskExists handling. * doc/options.texi: Remove MaskNeeded. diff --git a/gcc/doc/options.texi b/gcc/doc/options.texi index 0a54183..08b8b79 100644 --- a/gcc/doc/options.texi +++ b/gcc/doc/options.texi @@ -346,8 +346,6 @@ the value 1 when the option is active and 0 otherwise. If you use @code{Var} to attach the option to a different variable, the associated macros are called @code{OPTION_MASK_@var{name}} and @code{OPTION_@var{name}} respectively. -You can disable automatic bit allocation using @code{MaskExists}. - @item InverseMask(@var{othername}) @itemx InverseMask(@var{othername}, @var{thisname}) The option is the inverse of another option that has the @@ -355,15 +353,6 @@ The option is the inverse of another option that has the the options-processing script will declare a @code{TARGET_@var{thisname}} macro that is 1 when the option is active and 0 otherwise. -@item MaskExists -The mask specified by the @code{Mask} property already exists. -No @code{MASK} or @code{TARGET} definitions should be added to -@file{options.h} in response to this option record. - -The main purpose of this property is to support synonymous options. -The first option should use @samp{Mask(@var{name})} and the others -should use @samp{Mask(@var{name}) MaskExists}. - @item Enum(@var{name}) The option's argument is a string from the set of strings associated with the corresponding @samp{Enum} record. The string is checked and diff --git a/gcc/opth-gen.awk b/gcc/opth-gen.awk index 541bc3e..9a7b6c3 100644 --- a/gcc/opth-gen.awk +++ b/gcc/opth-gen.awk @@ -298,16 +298,25 @@ print ""; for (i = 0; i < n_opts; i++) { name = opt_args("Mask", flags[i]) - vname = var_name(flags[i]) - mask = "MASK_" - mask_1 = "1" - if (vname != "") { - mask = "OPTION_MASK_" - if (host_wide_int[vname] == "yes") - mask_1 = "HOST_WIDE_INT_1" + if (name == "") { + opt = opt_args("InverseMask", flags[i]) + if (opt ~ ",") + name = nth_arg(0, opt) + else + name = opt } - if (name != "" && !flag_set_p("MaskExists", flags[i])) + if (name != "" && mask_bits[name] == 0) { + mask_bits[name] = 1 + vname = var_name(flags[i]) + mask = "MASK_" + mask_1 = "1" + if (vname != "") { + mask = "OPTION_MASK_" + if (host_wide_int[vname] == "yes") + mask_1 = "HOST_WIDE_INT_1" + } print "#define " mask name " (" mask_1 " << " masknum[vname]++ ")" + } } for (i = 0; i < n_extra_masks; i++) { print "#define MASK_" extra_masks[i] " (1 << " masknum[""]++ ")" @@ -330,17 +339,26 @@ print "" for (i = 0; i < n_opts; i++) { name = opt_args("Mask", flags[i]) - vname = var_name(flags[i]) - macro = "OPTION_" - mask = "OPTION_MASK_" - if (vname == "") { - vname = "target_flags" - macro = "TARGET_" - mask = "MASK_" + if (name == "") { + opt = opt_args("InverseMask", flags[i]) + if (opt ~ ",") + name = nth_arg(0, opt) + else + name = opt } - if (name != "" && !flag_set_p("MaskExists", flags[i])) + if (name != "" && mask_macros[name] == 0) { + mask_macros[name] = 1 + vname = var_name(flags[i]) + macro = "OPTION_" + mask = "OPTION_MASK_" + if (vname == "") { + vname = "target_flags" + macro = "TARGET_" + mask = "MASK_" + } print "#define " macro name \ " ((" vname " & " mask name ") != 0)" + } } for (i = 0; i < n_extra_masks; i++) { print "#define TARGET_" extra_masks[i] \