On 29/07/2022 11:52, Richard Biener wrote:
On Fri, 29 Jul 2022, Jakub Jelinek wrote:
On Fri, Jul 29, 2022 at 09:57:29AM +0100, Andre Vieira (lists) via Gcc-patches
wrote:
The 'only on the vectorized code path' remains the same though as vect_recog
also only happens on the vectorized code path right?
if conversion (in some cases) duplicates a loop and guards one copy with
an ifn which resolves to true if that particular loop is vectorized and
false otherwise. So, then changes that shouldn't be done in case of
vectorization failure can be done on the for vectorizer only copy of the
loop.
And just to mention, one issue with lowering of bitfield accesses
is bitfield inserts which, on some architectures (hello m68k) have
instructions operating on memory directly. For those it's difficult
to not regress in code quality if a bitfield store becomes a
read-modify-write cycle. That's one of the things holding this
back. One idea would be to lower to .INSV directly for those targets
(but presence of insv isn't necessarily indicating support for
memory destinations).
Richard.
Should I account for that when vectorizing though? From what I can tell
(no TARGET_VECTOR_* hooks implemented) m68k does not have vectorization
support. So the question is, are there currently any targets that
vectorize and have vector bitfield-insert/extract support? If they don't
exist I suggest we worry about it when it comes around, if not just for
the fact that we wouldn't be able to test it right now.
If this is about not lowering on the non-vectorized path, see my
previous reply, I never intended to do that in the vectorizer. I just
thought it was the plan to do lowering eventually.
