Hi! On Fri, Oct 28, 2022 at 10:35:03AM +0200, Eric Botcazou via Gcc-patches wrote: > > (set (reg:SI 93) > > (neg:SI (ltu:SI (reg:CCC 17 flags) (const_int 0 [0])))) > > > > as > > > > (set (reg:SI 93) > > (neg:SI (ltu:SI (const_int 1) (const_int 0 [0])))) > > > > which leads to incorrect results since LTU on MODE_CC register isn't the > > same as "unsigned less than" in x86 backend. > > That's not specific to the x86 back-end, i.e. it's a generic caveat.
A MODE_CC reg can never be "const_int 1". That is total garbage. It cannot work. It would mean all of (eq (reg:CC) (const_int 0)) (lt (reg:CC) (const_int 0)) (gt (reg:CC) (const_int 0)) (ne (reg:CC) (const_int 0)) (ge (reg:CC) (const_int 0)) (le (reg:CC) (const_int 0)) (and more) are simultaneously true. > > PR target/107172 > > * config/i386/i386.md (UNSPEC_CC_NE): New. > > Replace ne:CCC/ne:CCO with UNSPEC_CC_NE in neg patterns. > > FWIW the SPARC back-end uses a COMPARE instead of an UNSPEC here. You mean in CCV? That works yes, but only because (or if) the setter and getter of the CC reg both use CCV (so never use any other flag at the same time; CCV has an empty intersection with all other CC modes). Segher
