> -----Original Message-----
> From: Andrea Corallo <andrea.cora...@arm.com>
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <kyrylo.tkac...@arm.com>; Richard Earnshaw
> <richard.earns...@arm.com>; Andrea Corallo <andrea.cora...@arm.com>
> Subject: [PATCH 34/35] arm: improve tests for vrshlq*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c: Improve tests.
> * gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c: Likewise.
Ok.
Thanks,
Kyrill
> ---
> .../arm/mve/intrinsics/vrshlq_m_n_s16.c | 25 +++++++++++++++---
> .../arm/mve/intrinsics/vrshlq_m_n_s32.c | 25 +++++++++++++++---
> .../arm/mve/intrinsics/vrshlq_m_n_s8.c | 25 +++++++++++++++---
> .../arm/mve/intrinsics/vrshlq_m_n_u16.c | 25 +++++++++++++++---
> .../arm/mve/intrinsics/vrshlq_m_n_u32.c | 25 +++++++++++++++---
> .../arm/mve/intrinsics/vrshlq_m_n_u8.c | 25 +++++++++++++++---
> .../arm/mve/intrinsics/vrshlq_m_s16.c | 26 ++++++++++++++++---
> .../arm/mve/intrinsics/vrshlq_m_s32.c | 26 ++++++++++++++++---
> .../arm/mve/intrinsics/vrshlq_m_s8.c | 26 ++++++++++++++++---
> .../arm/mve/intrinsics/vrshlq_m_u16.c | 26 ++++++++++++++++---
> .../arm/mve/intrinsics/vrshlq_m_u32.c | 26 ++++++++++++++++---
> .../arm/mve/intrinsics/vrshlq_m_u8.c | 26 ++++++++++++++++---
> .../arm/mve/intrinsics/vrshlq_n_s16.c | 16 ++++++++++--
> .../arm/mve/intrinsics/vrshlq_n_s32.c | 16 ++++++++++--
> .../arm/mve/intrinsics/vrshlq_n_s8.c | 16 ++++++++++--
> .../arm/mve/intrinsics/vrshlq_n_u16.c | 16 ++++++++++--
> .../arm/mve/intrinsics/vrshlq_n_u32.c | 16 ++++++++++--
> .../arm/mve/intrinsics/vrshlq_n_u8.c | 16 ++++++++++--
> .../arm/mve/intrinsics/vrshlq_s16.c | 16 ++++++++++--
> .../arm/mve/intrinsics/vrshlq_s32.c | 16 ++++++++++--
> .../gcc.target/arm/mve/intrinsics/vrshlq_s8.c | 16 ++++++++++--
> .../arm/mve/intrinsics/vrshlq_u16.c | 16 ++++++++++--
> .../arm/mve/intrinsics/vrshlq_u32.c | 16 ++++++++++--
> .../gcc.target/arm/mve/intrinsics/vrshlq_u8.c | 16 ++++++++++--
> .../arm/mve/intrinsics/vrshlq_x_s16.c | 25 +++++++++++++++---
> .../arm/mve/intrinsics/vrshlq_x_s32.c | 25 +++++++++++++++---
> .../arm/mve/intrinsics/vrshlq_x_s8.c | 25 +++++++++++++++---
> .../arm/mve/intrinsics/vrshlq_x_u16.c | 25 +++++++++++++++---
> .../arm/mve/intrinsics/vrshlq_x_u32.c | 25 +++++++++++++++---
> .../arm/mve/intrinsics/vrshlq_x_u8.c | 25 +++++++++++++++---
> 30 files changed, 564 insertions(+), 84 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c
> index cf51de6aa9c..c7d1f3a5b1c 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c
> @@ -1,22 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a, int32_t b, mve_pred16_t p)
> {
> return vrshlq_m_n_s16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vrshlt.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a, int32_t b, mve_pred16_t p)
> {
> return vrshlq_m_n (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c
> index dcfd99773e3..a8713e6a06a 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c
> @@ -1,22 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a, int32_t b, mve_pred16_t p)
> {
> return vrshlq_m_n_s32 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vrshlt.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
> {
> return vrshlq_m_n (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c
> index cc1b746dc0d..8160d1bdb04 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c
> @@ -1,22 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a, int32_t b, mve_pred16_t p)
> {
> return vrshlq_m_n_s8 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vrshlt.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a, int32_t b, mve_pred16_t p)
> {
> return vrshlq_m_n (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c
> index 93a95ba9065..b08f4c076d1 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c
> @@ -1,22 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t a, int32_t b, mve_pred16_t p)
> {
> return vrshlq_m_n_u16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vrshlt.u16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t a, int32_t b, mve_pred16_t p)
> {
> return vrshlq_m_n (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c
> index 4b8c82aba21..59f9a13d8c0 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c
> @@ -1,22 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t a, int32_t b, mve_pred16_t p)
> {
> return vrshlq_m_n_u32 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vrshlt.u32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t a, int32_t b, mve_pred16_t p)
> {
> return vrshlq_m_n (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c
> index f1ff9dd33b7..fda65f7c592 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c
> @@ -1,22 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint8x16_t a, int32_t b, mve_pred16_t p)
> {
> return vrshlq_m_n_u8 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vrshlt.u8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint8x16_t a, int32_t b, mve_pred16_t p)
> {
> return vrshlq_m_n (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c
> index 57f343cd3b9..20c9f5fcd7c 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c
> @@ -1,23 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vrshlq_m_s16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vrshlt.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vrshlq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vrshlt.s16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c
> index 2598b1719fd..af7a5158458 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c
> @@ -1,23 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vrshlq_m_s32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vrshlt.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vrshlq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vrshlt.s32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c
> index 6e4f1bdddf4..59d283ebb71 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c
> @@ -1,23 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vrshlq_m_s8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vrshlt.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vrshlq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vrshlt.s8" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c
> index d4d98913b75..e731cb71675 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c
> @@ -1,23 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vrshlq_m_u16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vrshlt.u16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vrshlq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vrshlt.u16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c
> index 5d60f1fe799..0379e0455c9 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c
> @@ -1,23 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vrshlq_m_u32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vrshlt.u32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vrshlq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vrshlt.u32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c
> index 913ba36c925..1e20486253e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c
> @@ -1,23 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vrshlq_m_u8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vrshlt.u8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vrshlq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vrshlt.u8" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c
> index 713c6a218b2..c846e9f06ee 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vrshl.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a, int32_t b)
> {
> return vrshlq_n_s16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vrshl.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vrshl.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a, int32_t b)
> {
> return vrshlq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vrshl.s16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c
> index 18906fe44d1..1c6144212f7 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vrshl.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a, int32_t b)
> {
> return vrshlq_n_s32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vrshl.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vrshl.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a, int32_t b)
> {
> return vrshlq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vrshl.s32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c
> index d5b1286d943..3b9d0a389dc 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vrshl.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a, int32_t b)
> {
> return vrshlq_n_s8 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vrshl.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vrshl.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a, int32_t b)
> {
> return vrshlq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vrshl.s8" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c
> index 49bb21663d7..77994bd3a29 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vrshl.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t a, int32_t b)
> {
> return vrshlq_n_u16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vrshl.u16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vrshl.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t a, int32_t b)
> {
> return vrshlq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vrshl.u16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c
> index 8ed67395b42..82774c794fe 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vrshl.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t a, int32_t b)
> {
> return vrshlq_n_u32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vrshl.u32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vrshl.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t a, int32_t b)
> {
> return vrshlq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vrshl.u32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c
> index ccc6a00b98a..e9badb7297e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vrshl.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint8x16_t a, int32_t b)
> {
> return vrshlq_n_u8 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vrshl.u8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vrshl.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint8x16_t a, int32_t b)
> {
> return vrshlq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vrshl.u8" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s16.c
> index c28ad31c6f9..4a64fc7b410 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s16.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vrshl.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a, int16x8_t b)
> {
> return vrshlq_s16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vrshl.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vrshl.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a, int16x8_t b)
> {
> return vrshlq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vrshl.s16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s32.c
> index 2e279b6fb0a..c5cbe266c0f 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s32.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vrshl.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a, int32x4_t b)
> {
> return vrshlq_s32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vrshl.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vrshl.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a, int32x4_t b)
> {
> return vrshlq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vrshl.s32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s8.c
> index 4d18419d1bf..85305921f9a 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s8.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vrshl.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a, int8x16_t b)
> {
> return vrshlq_s8 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vrshl.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vrshl.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a, int8x16_t b)
> {
> return vrshlq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vrshl.s8" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u16.c
> index e0a9ea9cebc..905a18c4f20 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u16.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vrshl.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t a, int16x8_t b)
> {
> return vrshlq_u16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vrshl.u16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vrshl.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t a, int16x8_t b)
> {
> return vrshlq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vrshl.u16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u32.c
> index 788a4b1b6fa..16c7578df39 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u32.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vrshl.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t a, int32x4_t b)
> {
> return vrshlq_u32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vrshl.u32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vrshl.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t a, int32x4_t b)
> {
> return vrshlq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vrshl.u32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u8.c
> index d860e9cccb9..8bf21eeaef5 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u8.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vrshl.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint8x16_t a, int8x16_t b)
> {
> return vrshlq_u8 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vrshl.u8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vrshl.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint8x16_t a, int8x16_t b)
> {
> return vrshlq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vrshl.u8" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c
> index 800a1e8e48f..4dfb6a65842 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c
> @@ -1,22 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vrshlq_x_s16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vrshlt.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vrshlq_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c
> index 921072a44c9..7f1f6dbb760 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c
> @@ -1,22 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vrshlq_x_s32 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vrshlt.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vrshlq_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c
> index 217b257ed24..69bf0a50fa6 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c
> @@ -1,22 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vrshlq_x_s8 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vrshlt.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vrshlq_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c
> index 5c0cad9ec89..b5a89892070 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c
> @@ -1,22 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vrshlq_x_u16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vrshlt.u16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vrshlq_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c
> index 2754d20841c..59ab2662021 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c
> @@ -1,22 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vrshlq_x_u32 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vrshlt.u32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vrshlq_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c
> index 46dada44559..b81d8d03da4 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c
> @@ -1,22 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vrshlq_x_u8 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vrshlt.u8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vrshlt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vrshlq_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
RE: [PATCH 34/35] arm: improve tests for vrshlq*
Kyrylo Tkachov via Gcc-patches Tue, 22 Nov 2022 09:04:54 -0800
- RE: [PATCH 08/35] arm: improve tests f... Kyrylo Tkachov via Gcc-patches
- [PATCH 22/35] arm: improve tests for vhsubq... Andrea Corallo via Gcc-patches
- RE: [PATCH 22/35] arm: improve tests f... Kyrylo Tkachov via Gcc-patches
- [PATCH 25/35] arm: improve tests and fix vm... Andrea Corallo via Gcc-patches
- RE: [PATCH 25/35] arm: improve tests a... Kyrylo Tkachov via Gcc-patches
- [PATCH 28/35] arm: improve tests for vqdmla... Andrea Corallo via Gcc-patches
- RE: [PATCH 28/35] arm: improve tests f... Kyrylo Tkachov via Gcc-patches
- [PATCH 18/35] arm: improve tests for vmulq* Andrea Corallo via Gcc-patches
- RE: [PATCH 18/35] arm: improve tests f... Kyrylo Tkachov via Gcc-patches
- [PATCH 34/35] arm: improve tests for vrshlq... Andrea Corallo via Gcc-patches
- RE: [PATCH 34/35] arm: improve tests f... Kyrylo Tkachov via Gcc-patches
- [PATCH 26/35] arm: improve tests for vmlasq... Andrea Corallo via Gcc-patches
- RE: [PATCH 26/35] arm: improve tests f... Kyrylo Tkachov via Gcc-patches
- [PATCH 21/35] arm: improve tests for vhaddq... Andrea Corallo via Gcc-patches
- RE: [PATCH 21/35] arm: improve tests f... Kyrylo Tkachov via Gcc-patches
- [PATCH 32/35] arm: improve tests for vqsubq... Andrea Corallo via Gcc-patches
- RE: [PATCH 32/35] arm: improve tests f... Kyrylo Tkachov via Gcc-patches
- [PATCH 29/35] arm: improve tests for vqdmul... Andrea Corallo via Gcc-patches
- RE: [PATCH 29/35] arm: improve tests f... Kyrylo Tkachov via Gcc-patches
- [PATCH 09/35] arm: improve tests for vmax* Andrea Corallo via Gcc-patches
- RE: [PATCH 09/35] arm: improve tests f... Kyrylo Tkachov via Gcc-patches
