Hi Jeff,
Sorry for the late review.
on 2022/9/15 16:30, Jiufu Guo wrote:
> Hi,
>
> For a complicate 64bit constant, blow is one instruction-sequence to
> build:
> lis 9,0x800a
> ori 9,9,0xabcd
> sldi 9,9,32
> oris 9,9,0xc167
> ori 9,9,0xfa16
>
> while we can also use below sequence to build:
> lis 9,0xc167
> lis 10,0x800a
> ori 9,9,0xfa16
> ori 10,10,0xabcd
> rldimi 9,10,32,0
> This sequence is using 2 registers to build high and low part firstly,
> and then merge them.
> In parallel aspect, this sequence would be faster. (Ofcause, using 1 more
> register with potential register pressure).
>
> Bootstrap and regtest pass on ppc64le.
> Is this ok for trunk?
>
>
> BR,
> Jeff(Jiufu)
>
>
> gcc/ChangeLog:
>
> * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Update 64bit
> constant build.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/powerpc/parall_5insn_const.c: New test.
>
> ---
> gcc/config/rs6000/rs6000.cc | 45 +++++++++++--------
> .../gcc.target/powerpc/parall_5insn_const.c | 27 +++++++++++
> 2 files changed, 53 insertions(+), 19 deletions(-)
> create mode 100644 gcc/testsuite/gcc.target/powerpc/parall_5insn_const.c
>
> diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
> index a656cb32a47..759c6309677 100644
> --- a/gcc/config/rs6000/rs6000.cc
> +++ b/gcc/config/rs6000/rs6000.cc
> @@ -10180,26 +10180,33 @@ rs6000_emit_set_long_const (rtx dest, HOST_WIDE_INT
> c)
> }
> else
> {
> - temp = !can_create_pseudo_p () ? dest : gen_reg_rtx (DImode);
> -
> - emit_move_insn (copy_rtx (temp),
> - GEN_INT (((ud4 << 16) ^ 0x80000000) - 0x80000000));
> - if (ud3 != 0)
> - emit_move_insn (copy_rtx (temp),
> - gen_rtx_IOR (DImode, copy_rtx (temp),
> - GEN_INT (ud3)));
> + if (can_create_pseudo_p ())
> + {
> + /* lis A,U4; ori A,U3; lis B,U2; ori B,U1; rldimi A,B,32,0. */
Nit: A, B are supposed to be H, L?
> + rtx H = gen_reg_rtx (DImode);
> + rtx L = gen_reg_rtx (DImode);
> + HOST_WIDE_INT num = (ud2 << 16) | ud1;
> + rs6000_emit_set_long_const (L, (num ^ 0x80000000) - 0x80000000);
> + num = (ud4 << 16) | ud3;
> + rs6000_emit_set_long_const (H, (num ^ 0x80000000) - 0x80000000);
> + emit_insn (gen_rotldi3_insert_3 (dest, H, GEN_INT (32), L,
> + GEN_INT (0xffffffff)));
> + }
> + else
> + {
> + /* lis A, U4; ori A,U3; rotl A,32; oris A,U2; ori A,U1. */
~~~ unexpected space?
> + emit_move_insn (dest,
> + GEN_INT (((ud4 << 16) ^ 0x80000000) - 0x80000000));
> + if (ud3 != 0)
> + emit_move_insn (dest, gen_rtx_IOR (DImode, dest, GEN_INT (ud3)));
>
> - emit_move_insn (ud2 != 0 || ud1 != 0 ? copy_rtx (temp) : dest,
> - gen_rtx_ASHIFT (DImode, copy_rtx (temp),
> - GEN_INT (32)));
> - if (ud2 != 0)
> - emit_move_insn (ud1 != 0 ? copy_rtx (temp) : dest,
> - gen_rtx_IOR (DImode, copy_rtx (temp),
> - GEN_INT (ud2 << 16)));
> - if (ud1 != 0)
> - emit_move_insn (dest,
> - gen_rtx_IOR (DImode, copy_rtx (temp),
> - GEN_INT (ud1)));
> + emit_move_insn (dest, gen_rtx_ASHIFT (DImode, dest, GEN_INT (32)));
> + if (ud2 != 0)
> + emit_move_insn (dest,
> + gen_rtx_IOR (DImode, dest, GEN_INT (ud2 << 16)));
> + if (ud1 != 0)
> + emit_move_insn (dest, gen_rtx_IOR (DImode, dest, GEN_INT (ud1)));
> + }
> }
> }
>
> diff --git a/gcc/testsuite/gcc.target/powerpc/parall_5insn_const.c
> b/gcc/testsuite/gcc.target/powerpc/parall_5insn_const.c
> new file mode 100644
> index 00000000000..ed8ccc73378
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/parall_5insn_const.c
> @@ -0,0 +1,27 @@
> +/* { dg-do run } */
> +/* { dg-options "-O2 -mdejagnu-cpu=power7 -save-temps" } */
Why do we need power7 here?
> +/* { dg-require-effective-target has_arch_ppc64 } */
> +
> +/* { dg-final { scan-assembler-times {\mlis\M} 4 } } */
> +/* { dg-final { scan-assembler-times {\mori\M} 4 } } */
> +/* { dg-final { scan-assembler-times {\mrldimi\M} 2 } } */
> +
> +void __attribute__ ((noinline)) foo (unsigned long long *a)
> +{
> + /* 2lis+2ori+1rldimi for each constant. */
Nit: seems better to read with "/* 2 lis + 2 ori + 1 rldimi for ..."
BR,
Kewen
