Hi Segher,
Thanks for your comment!
Segher Boessenkool <seg...@kernel.crashing.org> writes:
> On Mon, Nov 28, 2022 at 03:51:59PM +0800, Jiufu Guo wrote:
>> Jiufu Guo via Gcc-patches <gcc-patches@gcc.gnu.org> writes:
>> > Segher Boessenkool <seg...@kernel.crashing.org> writes:
>> >>> > + else
>> >>> > + {
>> >>> > + emit_move_insn (temp,
>> >>> > + GEN_INT (((ud2 << 16) ^ 0x80000000) -
>> >>> > 0x80000000));
>> >>> > + if (ud1 != 0)
>> >>> > + emit_move_insn (temp, gen_rtx_IOR (DImode, temp, GEN_INT
>> >>> > (ud1)));
>> >>> > + emit_move_insn (dest,
>> >>> > + gen_rtx_ZERO_EXTEND (DImode,
>> >>> > + gen_lowpart (SImode,
>> >>> > temp)));
>> >>> > + }
>> >>
>> >> Why this? Please just write it in DImode, do not go via SImode?
>> > Thanks for catch this. Yes, gen_lowpart with DImode would be ok.
>> Oh, Sorry. DImode can not be used here. The genreated pattern with
>> DImode can not be recognized. Using SImode is to match 'rlwxx'.
>
> There are patterns that accept DImode for rlwinm just fine. Please use
> (and:DI (const_int 0xffffffff) (x:DI))
> not the obfuscated
> (zero_extend:DI (subreg:SI (x:DI) LOWBYTE))
>
Agree, 'and 0xffffffff' would be easy to read. Here is an small patch
for it. I believe it should be no regression. :-) To make sure, I will
do more bootstraps and regtests, and then submit it.
BR,
Jeff (Jiufu)
NFC: use more readable pattern to clean high bits
This patch is just using a more readable pattern for "rldicl x,x,0,32"
to clean high 32bits.
Old pattern looks like: r118:DI=zero_extend(r120:DI#0)
new pattern looks like: r118:DI=r120:DI&0xffffffff
gcc/ChangeLog:
* config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Update
zero_extend(reg:DI#0) to reg:DI&0xffffffff
---
gcc/config/rs6000/rs6000.cc | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index eb7ad5e954f..5efe9b22d8b 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -10267,10 +10267,7 @@ rs6000_emit_set_long_const (rtx dest, HOST_WIDE_INT c)
emit_move_insn (copy_rtx (temp),
gen_rtx_IOR (DImode, copy_rtx (temp),
GEN_INT (ud1)));
- emit_move_insn (dest,
- gen_rtx_ZERO_EXTEND (DImode,
- gen_lowpart (SImode,
- copy_rtx (temp))));
+ emit_move_insn (dest, gen_rtx_AND (DImode, temp, GEN_INT (0xffffffff)));
}
else if (ud1 == ud3 && ud2 == ud4)
{
--
2.17.1
>
> Segher
