Hi Suwa-san, On Sun, Jan 15, 2023 at 6:53 PM Takayuki 'January June' Suwa <jjsuwa_sys3...@yahoo.co.jp> wrote: > > In the case of the CALL0 ABI, values that must be retained before and > after function calls are placed in the callee-saved registers (A12 > through A15) and referenced later. However, it is often the case that > the save and the reference are each only once and a simple register- > register move. > > e.g. in the following example, if there are no other occurrences of > register A14: > > ;; before > ; prologue { > ... > s32i.n a14, sp, 16 > ... > ; } prologue > ... > mov.n a14, a6 > ... > call0 foo > ... > mov.n a8, a14 > ... > ; epilogue { > ... > l32i.n a14, sp, 16 > ... > ; } epilogue > > It can be possible like this: > > ;; after > ; prologue { > ... > (deleted) > ... > ; } prologue > ... > s32i.n a6, sp, 16 > ... > call0 foo > ... > l32i.n a8, sp, 16 > ... > ; epilogue { > ... > (deleted) > ... > ; } epilogue > > This patch introduces a new peephole2 pattern that implements the above. > > gcc/ChangeLog: > > * config/xtensa/xtensa.md: New peephole2 pattern that eliminates > the use of callee-saved register that saves and restores only once > for other register, by using its stack slot directly. > --- > gcc/config/xtensa/xtensa.md | 58 +++++++++++++++++++++++++++++++++++++ > 1 file changed, 58 insertions(+)
This change introduces a bunch of test failures in cases where alloca or similar mechanisms are used in a function and a15 is used as a stack frame pointer. E.g., gcc.c-torture/execute/pr82210.c has the following diff: @@ -20,9 +20,8 @@ srli a10, a10, 4 slli a10, a10, 4 s32i.n a12, sp, 8 - s32i.n a15, sp, 0 s32i.n a0, sp, 12 - mov.n a15, sp + s32i.n sp, sp, 0 sub sp, sp, a10 mov.n a6, sp mov.n a12, a6 @@ -59,11 +58,10 @@ addi.n a2, a2, 4 bne a12, a13, .L6 .L1: - mov.n sp, a15 + l32i.n sp, sp, 0 l32i.n a0, sp, 12 l32i.n a12, sp, 8 l32i.n a13, sp, 4 - l32i.n a15, sp, 0 addi sp, sp, 16 ret.n .size foo, .-foo -- Thanks. -- Max