Lulu Cheng <chengl...@loongson.cn> writes:
> Co-authored-by: Yang Yujie <yangyu...@loongson.cn>
>
> gcc/ChangeLog:
>
> * config/loongarch/loongarch.cc (loongarch_classify_address):
> Add precessint for CONST_INT.
> (loongarch_print_operand_reloc): Operand modifier 'c' is supported.
> (loongarch_print_operand): Increase the processing of '%c'.
> * doc/extend.texi: Adds documents for LoongArch operand modifiers.
> And port the public operand modifiers information to this document.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/loongarch/tst-asm-const.c: Moved to...
> * gcc.target/loongarch/pr107731.c: ...here.
> ---
> V2 -> v3:
> 1. Correct a clerical error.
> 2. Adding document for loongarch operand modifiers.
>
> v3 -> v4:
> Copy the description of "%c" "%n" "%a" "%l" from gccint.pdf to gcc.pdf.
>
> v4 -> v5:
> Move the operand modifiers description of "%c", "%n", "%a", "%l" to the top
> of the
> x86Operandmodifiers section.
>
> v5 -> v6:
> Adjust the location of the added section in the document.
>
> ---
> gcc/config/loongarch/loongarch.cc | 14 +++++
> gcc/doc/extend.texi | 51 +++++++++++++++++--
> .../loongarch/{tst-asm-const.c => pr107731.c} | 6 +--
> 3 files changed, 64 insertions(+), 7 deletions(-)
> rename gcc/testsuite/gcc.target/loongarch/{tst-asm-const.c => pr107731.c}
> (78%)
>
> diff --git a/gcc/config/loongarch/loongarch.cc
> b/gcc/config/loongarch/loongarch.cc
> index c6b03fcf2f9..cdf190b985e 100644
> --- a/gcc/config/loongarch/loongarch.cc
> +++ b/gcc/config/loongarch/loongarch.cc
> @@ -2075,6 +2075,11 @@ loongarch_classify_address (struct
> loongarch_address_info *info, rtx x,
> return (loongarch_valid_base_register_p (info->reg, mode, strict_p)
> && loongarch_valid_lo_sum_p (info->symbol_type, mode,
> info->offset));
> + case CONST_INT:
> + /* Small-integer addresses don't occur very often, but they
> + are legitimate if $r0 is a valid base register. */
> + info->type = ADDRESS_CONST_INT;
> + return IMM12_OPERAND (INTVAL (x));
>
> default:
> return false;
> @@ -4933,6 +4938,7 @@ loongarch_print_operand_reloc (FILE *file, rtx op, bool
> hi64_part,
>
> 'A' Print a _DB suffix if the memory model requires a release.
> 'b' Print the address of a memory operand, without offset.
> + 'c' Print an integer.
> 'C' Print the integer branch condition for comparison OP.
> 'd' Print CONST_INT OP in decimal.
> 'F' Print the FPU branch condition for comparison OP.
> @@ -4979,6 +4985,14 @@ loongarch_print_operand (FILE *file, rtx op, int
> letter)
> fputs ("_db", file);
> break;
>
> + case 'c':
> + if (CONST_INT_P (op))
> + fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (op));
> + else
> + output_operand_lossage ("unsupported operand for code '%c'", letter);
> +
> + break;
> +
> case 'C':
> loongarch_print_int_branch_condition (file, code, letter);
> break;
> diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
> index 1103e9936f7..6a5d9faf2f3 100644
> --- a/gcc/doc/extend.texi
> +++ b/gcc/doc/extend.texi
> @@ -10402,8 +10402,10 @@ ensures that modifying @var{a} does not affect the
> address referenced by
> is undefined if @var{a} is modified before using @var{b}.
>
> @code{asm} supports operand modifiers on operands (for example @samp{%k2}
> -instead of simply @samp{%2}). Typically these qualifiers are hardware
> -dependent. The list of supported modifiers for x86 is found at
> +instead of simply @samp{%2}). @ref{GenericOperandmodifiers,
> +Generic Operand modifiers} lists the modifiers that are available
> +on all targets. Other modifiers are hardware dependent.
> +For example, the list of supported modifiers for x86 is found at
> @ref{x86Operandmodifiers,x86 Operand modifiers}.
>
> If the C code that follows the @code{asm} makes no use of any of the output
> @@ -10671,8 +10673,10 @@ optimizers may discard the @code{asm} statement as
> unneeded
> (see @ref{Volatile}).
>
> @code{asm} supports operand modifiers on operands (for example @samp{%k2}
> -instead of simply @samp{%2}). Typically these qualifiers are hardware
> -dependent. The list of supported modifiers for x86 is found at
> +instead of simply @samp{%2}). @ref{GenericOperandmodifiers,
> +Generic Operand modifiers} lists the modifiers that are available
> +on all targets. Other modifiers are hardware dependent.
> +For example, the list of supported modifiers for x86 is found at
> @ref{x86Operandmodifiers,x86 Operand modifiers}.
>
> In this example using the fictitious @code{combine} instruction, the
> @@ -11024,6 +11028,30 @@ lab:
> @}
> @end example
>
> +@anchor{GenericOperandmodifiers}
> +@subsubsection Generic Operand Modifiers
> +@noindent
> +The following table shows the modifiers supported by all targets and their
> effects:
> +
> +@multitable {Modifier} {Print the opcode suffix for the size of th} {Operand}
I guess this should be {Modifier} {Description} {...} too. Maybe
{Example} would be better than {Operand} for the final column.
> +@headitem Modifier @tab Description @tab Operand
s/Operand/Example/ here too.
OK with those changes, thanks.
Richard
> +@item @code{c}
> +@tab Require a constant operand and print the constant expression with no
> punctuation.
> +@tab @code{%c0}
> +@item @code{n}
> +@tab Like @samp{%c} except that the value of the constant is negated before
> printing.
> +@tab @code{%n0}
> +@item @code{a}
> +@tab Substitutes a memory reference, with the actual operand treated as the
> address.
s/Substitutes/Substitute/
> +This may be useful when outputting a ``load address'' instruction, because
> +often the assembler syntax for such an instruction requires you to write the
> +operand as if it were a memory reference.
> +@tab @code{%a0}
> +@item @code{l}
> +@tab Print the label name with no punctuation.
> +@tab @code{%l0}
> +@end multitable
> +
> @anchor{x86Operandmodifiers}
> @subsubsection x86 Operand Modifiers
>
> @@ -11374,6 +11402,21 @@ constant. Used to select the specified bit position.
> @item @code{x} @tab Equivialent to @code{X}, but only for pointers.
> @end multitable
>
> +@anchor{loongarchOperandmodifiers}
> +@subsubsection LoongArch Operand Modifiers
> +
> +The list below describes the supported modifiers and their effects for
> LoongArch.
> +
> +@multitable @columnfractions .10 .90
> +@headitem Modifier @tab Description
> +@item @code{d} @tab Same as @code{c}.
> +@item @code{i} @tab Print the character ''@code{i}'' if the operand is not a
> register.
> +@item @code{m} @tab Same as @code{c}, but the printed value is @code{operand
> - 1}.
> +@item @code{X} @tab Print a constant integer operand in hexadecimal.
> +@item @code{z} @tab Print the operand in its unmodified form, followed by a
> comma.
> +@end multitable
> +
> +
> @lowersections
> @include md.texi
> @raisesections
> diff --git a/gcc/testsuite/gcc.target/loongarch/tst-asm-const.c
> b/gcc/testsuite/gcc.target/loongarch/pr107731.c
> similarity index 78%
> rename from gcc/testsuite/gcc.target/loongarch/tst-asm-const.c
> rename to gcc/testsuite/gcc.target/loongarch/pr107731.c
> index 2e04b99e301..80d84c48c6e 100644
> --- a/gcc/testsuite/gcc.target/loongarch/tst-asm-const.c
> +++ b/gcc/testsuite/gcc.target/loongarch/pr107731.c
> @@ -1,13 +1,13 @@
> -/* Test asm const. */
> /* { dg-do compile } */
> /* { dg-final { scan-assembler-times "foo:.*\\.long 1061109567.*\\.long 52"
> 1 } } */
> +
> int foo ()
> {
> __asm__ volatile (
> "foo:"
> "\n\t"
> - ".long %a0\n\t"
> - ".long %a1\n\t"
> + ".long %c0\n\t"
> + ".long %c1\n\t"
> :
> :"i"(0x3f3f3f3f), "i"(52)
> :
