Prathamesh Kulkarni <prathamesh.kulka...@linaro.org> writes:
> Hi Richard,
> Based on your suggestion in the other thread, the patch uses
> exact_log2 (INTVAL (operands[2])) >= 0 to gate for vec_merge patterns.
> Bootstrap+test in progress on aarch64-linux-gnu.
> Does it look OK ?
Yeah, this is OK, thanks. IMO it's a latent bug and suitable for stage 4.
Richard
>
> Thanks,
> Prathamesh
>
> [aarch64] Use exact_log2 (INTVAL (operands[2])) >= 0 to gate for vec_merge
> patterns.
>
> gcc/ChangeLog:
> * gcc/config/aarch64-simd.md (aarch64_simd_vec_set<mode>): Use
> exact_log2 (INTVAL (operands[2])) >= 0 as condition for gating
> the pattern.
> (aarch64_simd_vec_copy_lane<mode>): Likewise.
> (aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
>
> diff --git a/gcc/config/aarch64/aarch64-simd.md
> b/gcc/config/aarch64/aarch64-simd.md
> index 104088f67d2..7cc8c00f0ec 100644
> --- a/gcc/config/aarch64/aarch64-simd.md
> +++ b/gcc/config/aarch64/aarch64-simd.md
> @@ -1064,7 +1064,7 @@
> (match_operand:<VEL> 1 "aarch64_simd_nonimmediate_operand"
> "w,?r,Utv"))
> (match_operand:VALL_F16 3 "register_operand" "0,0,0")
> (match_operand:SI 2 "immediate_operand" "i,i,i")))]
> - "TARGET_SIMD"
> + "TARGET_SIMD && exact_log2 (INTVAL (operands[2])) >= 0"
> {
> int elt = ENDIAN_LANE_N (<nunits>, exact_log2 (INTVAL (operands[2])));
> operands[2] = GEN_INT ((HOST_WIDE_INT) 1 << elt);
> @@ -1093,7 +1093,7 @@
> [(match_operand:SI 4 "immediate_operand" "i")])))
> (match_operand:VALL_F16 1 "register_operand" "0")
> (match_operand:SI 2 "immediate_operand" "i")))]
> - "TARGET_SIMD"
> + "TARGET_SIMD && exact_log2 (INTVAL (operands[2])) >= 0"
> {
> int elt = ENDIAN_LANE_N (<nunits>, exact_log2 (INTVAL (operands[2])));
> operands[2] = GEN_INT (HOST_WIDE_INT_1 << elt);
> @@ -1114,7 +1114,7 @@
> [(match_operand:SI 4 "immediate_operand" "i")])))
> (match_operand:VALL_F16_NO_V2Q 1 "register_operand" "0")
> (match_operand:SI 2 "immediate_operand" "i")))]
> - "TARGET_SIMD"
> + "TARGET_SIMD && exact_log2 (INTVAL (operands[2])) >= 0"
> {
> int elt = ENDIAN_LANE_N (<nunits>, exact_log2 (INTVAL (operands[2])));
> operands[2] = GEN_INT (HOST_WIDE_INT_1 << elt);
