committed, thanks.
On Tue, Jan 3, 2023 at 2:56 PM <juzhe.zh...@rivai.ai> wrote:
> From: Ju-Zhe Zhong <juzhe.zh...@rivai.ai>
>
> Currently we support this optimization:
>
> bb 0:
> vsetvli a5,zero,e32,mf2
> bb 1:
> vsetvli a5,zero,e64,m1 --> vsetvli zero,zero,e64,m1
>
> According RVV ISA, we can do this optimization only if both RATIO and AVL
> are equal.
> However, current VSETVL PASS missed the check of AVL. This patch add this
> condition
> check to fix bugs.
>
> gcc/ChangeLog:
>
> * config/riscv/riscv-vsetvl.cc
> (vector_infos_manager::all_same_avl_p): New function.
> (pass_vsetvl::can_refine_vsetvl_p): Add AVL check.
> (pass_vsetvl::commit_vsetvls): Ditto.
> * config/riscv/riscv-vsetvl.h: New function declaration.
>
> ---
> gcc/config/riscv/riscv-vsetvl.cc | 35 ++++++++++++++++++++++++++++----
> gcc/config/riscv/riscv-vsetvl.h | 3 +++
> 2 files changed, 34 insertions(+), 4 deletions(-)
>
> diff --git a/gcc/config/riscv/riscv-vsetvl.cc
> b/gcc/config/riscv/riscv-vsetvl.cc
> index ce1e9e3609f..1afe76304fb 100644
> --- a/gcc/config/riscv/riscv-vsetvl.cc
> +++ b/gcc/config/riscv/riscv-vsetvl.cc
> @@ -1440,6 +1440,29 @@ vector_infos_manager::all_same_ratio_p (sbitmap
> bitdata) const
> return true;
> }
>
> +bool
> +vector_infos_manager::all_same_avl_p (const basic_block cfg_bb,
> + sbitmap bitdata) const
> +{
> + if (bitmap_empty_p (bitdata))
> + return false;
> +
> + const auto &block_info = vector_block_infos[cfg_bb->index];
> + if (!block_info.local_dem.demand_p (DEMAND_AVL))
> + return true;
> +
> + avl_info avl = block_info.local_dem.get_avl_info ();
> + unsigned int bb_index;
> + sbitmap_iterator sbi;
> +
> + EXECUTE_IF_SET_IN_BITMAP (bitdata, 0, bb_index, sbi)
> + {
> + if (vector_exprs[bb_index]->get_avl_info () != avl)
> + return false;
> + }
> + return true;
> +}
> +
> size_t
> vector_infos_manager::expr_set_num (sbitmap bitdata) const
> {
> @@ -2113,6 +2136,10 @@ pass_vsetvl::can_refine_vsetvl_p (const basic_block
> cfg_bb, uint8_t ratio) const
> m_vector_manager->vector_avin[cfg_bb->index]))
> return false;
>
> + if (!m_vector_manager->all_same_avl_p (
> + cfg_bb, m_vector_manager->vector_avin[cfg_bb->index]))
> + return false;
> +
> size_t expr_id
> = bitmap_first_set_bit (m_vector_manager->vector_avin[cfg_bb->index]);
> if (m_vector_manager->vector_exprs[expr_id]->get_ratio () != ratio)
> @@ -2227,11 +2254,11 @@ pass_vsetvl::commit_vsetvls (void)
>
> insn_info *insn = require->get_insn ();
> vector_insn_info prev_info = vector_insn_info ();
> - if (m_vector_manager->all_same_ratio_p (
> - m_vector_manager->vector_avout[eg->src->index]))
> + sbitmap bitdata =
> m_vector_manager->vector_avout[eg->src->index];
> + if (m_vector_manager->all_same_ratio_p (bitdata)
> + && m_vector_manager->all_same_avl_p (eg->dest, bitdata))
> {
> - size_t first = bitmap_first_set_bit (
> - m_vector_manager->vector_avout[eg->src->index]);
> + size_t first = bitmap_first_set_bit (bitdata);
> prev_info = *m_vector_manager->vector_exprs[first];
> }
>
> diff --git a/gcc/config/riscv/riscv-vsetvl.h
> b/gcc/config/riscv/riscv-vsetvl.h
> index 6f27004fab1..c8218a6ff00 100644
> --- a/gcc/config/riscv/riscv-vsetvl.h
> +++ b/gcc/config/riscv/riscv-vsetvl.h
> @@ -333,6 +333,9 @@ public:
> /* Get all relaxer expression id for corresponding vector info. */
> auto_vec<size_t> get_all_available_exprs (const vector_insn_info &)
> const;
>
> + /* Return true if all expression set in bitmap are same AVL. */
> + bool all_same_avl_p (const basic_block, sbitmap) const;
> +
> /* Return true if all expression set in bitmap are same ratio. */
> bool all_same_ratio_p (sbitmap) const;
>
> --
> 2.36.3
>
>
