Applied to master, thanks! Philipp.
On Mon, 27 Mar 2023 at 19:55, Kito Cheng <kito.ch...@sifive.com> wrote: > > OK for trunk, thanks :) > > On Mon, Mar 27, 2023 at 7:04 PM Christoph Muellner > <christoph.muell...@vrull.eu> wrote: >> >> From: Christoph Müllner <christoph.muell...@vrull.eu> >> >> This patch adds missing mode specifiers for XTheadMemPair INSNs. >> >> gcc/ChangeLog: >> PR target/109296 >> * config/riscv/thead.md: Add missing mode specifiers. >> >> Signed-off-by: Christoph Müllner <christoph.muell...@vrull.eu> >> --- >> gcc/config/riscv/thead.md | 16 ++++++++-------- >> 1 file changed, 8 insertions(+), 8 deletions(-) >> >> diff --git a/gcc/config/riscv/thead.md b/gcc/config/riscv/thead.md >> index 63c4af6f77d..0623607d3dc 100644 >> --- a/gcc/config/riscv/thead.md >> +++ b/gcc/config/riscv/thead.md >> @@ -321,10 +321,10 @@ (define_insn "*th_mempair_store_<GPR:mode>2" >> >> ;; MEMPAIR load DI extended signed SI >> (define_insn "*th_mempair_load_extendsidi2" >> - [(set (match_operand 0 "register_operand" "=r") >> - (sign_extend:DI (match_operand 1 "memory_operand" "m"))) >> - (set (match_operand 2 "register_operand" "=r") >> - (sign_extend:DI (match_operand 3 "memory_operand" "m")))] >> + [(set (match_operand:DI 0 "register_operand" "=r") >> + (sign_extend:DI (match_operand:SI 1 "memory_operand" "m"))) >> + (set (match_operand:DI 2 "register_operand" "=r") >> + (sign_extend:DI (match_operand:SI 3 "memory_operand" "m")))] >> "TARGET_XTHEADMEMPAIR && TARGET_64BIT && reload_completed >> && th_mempair_operands_p (operands, true, SImode)" >> { return th_mempair_output_move (operands, true, SImode, SIGN_EXTEND); } >> @@ -334,10 +334,10 @@ (define_insn "*th_mempair_load_extendsidi2" >> >> ;; MEMPAIR load DI extended unsigned SI >> (define_insn "*th_mempair_load_zero_extendsidi2" >> - [(set (match_operand 0 "register_operand" "=r") >> - (zero_extend:DI (match_operand 1 "memory_operand" "m"))) >> - (set (match_operand 2 "register_operand" "=r") >> - (zero_extend:DI (match_operand 3 "memory_operand" "m")))] >> + [(set (match_operand:DI 0 "register_operand" "=r") >> + (zero_extend:DI (match_operand:SI 1 "memory_operand" "m"))) >> + (set (match_operand:DI 2 "register_operand" "=r") >> + (zero_extend:DI (match_operand:SI 3 "memory_operand" "m")))] >> "TARGET_XTHEADMEMPAIR && TARGET_64BIT && reload_completed >> && th_mempair_operands_p (operands, true, SImode)" >> { return th_mempair_output_move (operands, true, SImode, ZERO_EXTEND); } >> -- >> 2.39.2 >>