Yeah. But this patch is not appropriate now since it is conflict with the upstream GCC. I am gonna re-check the current upstream GCC and the queue patch for GCC 14. If there are some conflicts, I will resend them.
Thanks juzhe.zh...@rivai.ai From: Jeff Law Date: 2023-04-13 07:00 To: juzhe.zhong; gcc-patches CC: kito.cheng; palmer Subject: Re: [PATCH] RISC-V: Fix incorrect condition of EEW = 64 mode On 4/6/23 19:11, juzhe.zh...@rivai.ai wrote: > From: Juzhe-Zhong <juzhe.zh...@rivai.ai> > > This patch should be merged before this patch: > https://gcc.gnu.org/pipermail/gcc-patches/2023-March/614935.html > > According to RVV ISA, the EEW = 64 is enable only when -march=*zve64* > Current condition is incorrect, since -march=*zve32*_zvl64b will enable EEW = > 64 which > is incorrect. > > gcc/ChangeLog: > > * config/riscv/riscv-vector-switch.def (ENTRY): Change to > TARGET_VECTOR_ELEN_64. Just to be clear, this was for gcc-14, right? I don't see these modes in the current trunk. jeff
