Hi Richard, Jeff: It's it possible to backport to GCC 13? highway is one of our important users for RISC-V vector stuff, and it has built in some distro, so we believe this bug fix is important to backport.
Thanks Hi Ju-Zhe: Thanks for update On Wed, Apr 19, 2023 at 7:25 AM <juzhe.zh...@rivai.ai> wrote: > > From: Ju-Zhe Zhong <juzhe.zh...@rivai.ai> > > Fix bug reported by google/highway who is using rvv intrinsic: > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109535 > > PR 109535 > > gcc/ChangeLog: > > * config/riscv/riscv-vsetvl.cc (count_regno_occurrences): New > function. > (pass_vsetvl::cleanup_insns): Fix bug. > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/rvv/base/pr109535.c: New test. > > --- > gcc/config/riscv/riscv-vsetvl.cc | 15 ++++++++++++++- > .../gcc.target/riscv/rvv/base/pr109535.c | 11 +++++++++++ > 2 files changed, 25 insertions(+), 1 deletion(-) > create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/pr109535.c > > diff --git a/gcc/config/riscv/riscv-vsetvl.cc > b/gcc/config/riscv/riscv-vsetvl.cc > index 1b66e3b9eeb..b570b003a1e 100644 > --- a/gcc/config/riscv/riscv-vsetvl.cc > +++ b/gcc/config/riscv/riscv-vsetvl.cc > @@ -1592,6 +1592,19 @@ backward_propagate_worthwhile_p (const basic_block > cfg_bb, > return true; > } > > +/* Count the number of REGNO in RINSN. */ > +static int > +count_regno_occurrences (rtx_insn *rinsn, unsigned int regno) > +{ > + int count = 0; > + extract_insn (rinsn); > + for (int i = 0; i < recog_data.n_operands; i++) > + if (REG_P (recog_data.operand[i]) > + && REGNO (recog_data.operand[i]) == regno) > + count++; > + return count; > +} > + > avl_info::avl_info (const avl_info &other) > { > m_value = other.get_value (); > @@ -3924,7 +3937,7 @@ pass_vsetvl::cleanup_insns (void) const > if (!has_vl_op (rinsn) || !REG_P (get_vl (rinsn))) > continue; > rtx avl = get_vl (rinsn); > - if (count_occurrences (PATTERN (rinsn), avl, 0) == 1) > + if (count_regno_occurrences (rinsn, REGNO (avl)) == 1) > { > /* Get the list of uses for the new instruction. */ > auto attempt = crtl->ssa->new_change_attempt (); > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr109535.c > b/gcc/testsuite/gcc.target/riscv/rvv/base/pr109535.c > new file mode 100644 > index 00000000000..7582fe9c392 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr109535.c > @@ -0,0 +1,11 @@ > +/* { dg-do compile } */ > +/* { dg-options "-O3 -march=rv32gcv -mabi=ilp32d" } */ > + > +#include "riscv_vector.h" > + > +void foo(void *in1, void *in2, void *in3, void *out, size_t vl) { > + vint8m1_t a = __riscv_vle8_v_i8m1(in1, vl); > + vint8m1_t b = __riscv_vadd_vx_i8m1 (a, vl, vl); > + __riscv_vse8_v_i8m1(out, b, vl); > +} > + > -- > 2.36.1 >
