}
-/* { dg-final { scan-assembler "vstrw.32" } } */
+/*
+**foo1:
+** ...
+** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (float32_t * addr, float32x4_t value)
+foo1 (float32_t *base, float32x4_t value)
{
- vstrwq (addr, value);
+ return vstrwq (base, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrw.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c
index 411de6414f7..f1992a67736 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (float32_t * addr, float32x4_t value, mve_pred16_t p)
+foo (float32_t *base, float32x4_t value, mve_pred16_t p)
{
- vstrwq_p_f32 (addr, value, p);
+ return vstrwq_p_f32 (base, value, p);
}
-/* { dg-final { scan-assembler "vstrwt.32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (float32_t * addr, float32x4_t value, mve_pred16_t p)
+foo1 (float32_t *base, float32x4_t value, mve_pred16_t p)
{
- vstrwq_p (addr, value, p);
+ return vstrwq_p (base, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrwt.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_s32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_s32.c
index 3b042814d27..a00aeabb9fe 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_s32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (int32_t * addr, int32x4_t value, mve_pred16_t p)
+foo (int32_t *base, int32x4_t value, mve_pred16_t p)
{
- vstrwq_p_s32 (addr, value, p);
+ return vstrwq_p_s32 (base, value, p);
}
-/* { dg-final { scan-assembler "vstrwt.32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (int32_t * addr, int32x4_t value, mve_pred16_t p)
+foo1 (int32_t *base, int32x4_t value, mve_pred16_t p)
{
- vstrwq_p (addr, value, p);
+ return vstrwq_p (base, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrwt.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_u32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_u32.c
index b9e92204c88..05fded8aac8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_u32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (uint32_t * addr, uint32x4_t value, mve_pred16_t p)
+foo (uint32_t *base, uint32x4_t value, mve_pred16_t p)
{
- vstrwq_p_u32 (addr, value, p);
+ return vstrwq_p_u32 (base, value, p);
}
-/* { dg-final { scan-assembler "vstrwt.32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (uint32_t * addr, uint32x4_t value, mve_pred16_t p)
+foo1 (uint32_t *base, uint32x4_t value, mve_pred16_t p)
{
- vstrwq_p (addr, value, p);
+ return vstrwq_p (base, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrwt.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_s32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_s32.c
index c7b3d91a972..b2a184f3c66 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (int32_t * addr, int32x4_t value)
+foo (int32_t *base, int32x4_t value)
{
- vstrwq_s32 (addr, value);
+ return vstrwq_s32 (base, value);
}
-/* { dg-final { scan-assembler "vstrw.32" } } */
+/*
+**foo1:
+** ...
+** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (int32_t * addr, int32x4_t value)
+foo1 (int32_t *base, int32x4_t value)
{
- vstrwq (addr, value);
+ return vstrwq (base, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrw.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_f32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_f32.c
index f8b56917295..c80e8d9cdc5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_f32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|)
+** ...
+*/
void
foo (uint32x4_t addr, float32x4_t value)
{
- vstrwq_scatter_base_f32 (addr, 8, value);
+ return vstrwq_scatter_base_f32 (addr, 0, value);
}
-/* { dg-final { scan-assembler "vstrw.u32" } } */
+/*
+**foo1:
+** ...
+** vstrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|)
+** ...
+*/
void
foo1 (uint32x4_t addr, float32x4_t value)
{
- vstrwq_scatter_base (addr, 8, value);
+ return vstrwq_scatter_base (addr, 0, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrw.u32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_f32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_f32.c
index 4a75e6503e1..237843c0661 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_f32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|)
+** ...
+*/
void
foo (uint32x4_t addr, float32x4_t value, mve_pred16_t p)
{
- vstrwq_scatter_base_p_f32 (addr, 8, value, p);
+ return vstrwq_scatter_base_p_f32 (addr, 0, value, p);
}
-/* { dg-final { scan-assembler "vstrwt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|)
+** ...
+*/
void
foo1 (uint32x4_t addr, float32x4_t value, mve_pred16_t p)
{
- vstrwq_scatter_base_p (addr, 8, value, p);
+ return vstrwq_scatter_base_p (addr, 0, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrwt.u32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_s32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_s32.c
index 5ac4f300a7d..5f4f4a09664 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_s32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|)
+** ...
+*/
void
foo (uint32x4_t addr, int32x4_t value, mve_pred16_t p)
{
- vstrwq_scatter_base_p_s32 (addr, 8, value, p);
+ return vstrwq_scatter_base_p_s32 (addr, 0, value, p);
}
-/* { dg-final { scan-assembler "vstrwt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|)
+** ...
+*/
void
foo1 (uint32x4_t addr, int32x4_t value, mve_pred16_t p)
{
- vstrwq_scatter_base_p (addr, 8, value, p);
+ return vstrwq_scatter_base_p (addr, 0, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrwt.u32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_u32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_u32.c
index e564f26b9c7..8c5cf63f861 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_u32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|)
+** ...
+*/
void
foo (uint32x4_t addr, uint32x4_t value, mve_pred16_t p)
{
- vstrwq_scatter_base_p_u32 (addr, 8, value, p);
+ return vstrwq_scatter_base_p_u32 (addr, 0, value, p);
}
-/* { dg-final { scan-assembler "vstrwt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|)
+** ...
+*/
void
foo1 (uint32x4_t addr, uint32x4_t value, mve_pred16_t p)
{
- vstrwq_scatter_base_p (addr, 8, value, p);
+ return vstrwq_scatter_base_p (addr, 0, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrwt.u32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_s32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_s32.c
index 5bba36db5cb..5208cf4f808 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|)
+** ...
+*/
void
foo (uint32x4_t addr, int32x4_t value)
{
- vstrwq_scatter_base_s32 (addr, 8, value);
+ return vstrwq_scatter_base_s32 (addr, 0, value);
}
-/* { dg-final { scan-assembler "vstrw.u32" } } */
+/*
+**foo1:
+** ...
+** vstrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|)
+** ...
+*/
void
foo1 (uint32x4_t addr, int32x4_t value)
{
- vstrwq_scatter_base (addr, 8, value);
+ return vstrwq_scatter_base (addr, 0, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrw.u32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_u32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_u32.c
index 1dcbb5a739c..e728db2b9f1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_u32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|)
+** ...
+*/
void
foo (uint32x4_t addr, uint32x4_t value)
{
- vstrwq_scatter_base_u32 (addr, 8, value);
+ return vstrwq_scatter_base_u32 (addr, 0, value);
}
-/* { dg-final { scan-assembler "vstrw.u32" } } */
+/*
+**foo1:
+** ...
+** vstrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|)
+** ...
+*/
void
foo1 (uint32x4_t addr, uint32x4_t value)
{
- vstrwq_scatter_base (addr, 8, value);
+ return vstrwq_scatter_base (addr, 0, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrw.u32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c
index b2cc6e555ae..e481191aa57 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c
@@ -1,19 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|)
+** ...
+*/
void
-foo (uint32x4_t * addr, const int offset, float32x4_t value)
+foo (uint32x4_t *addr, float32x4_t value)
{
- vstrwq_scatter_base_wb_f32 (addr, 8, value);
+ return vstrwq_scatter_base_wb_f32 (addr, 0, value);
}
+
+/*
+**foo1:
+** ...
+** vstrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|)
+** ...
+*/
void
-foo1 (uint32x4_t * addr, const int offset, float32x4_t value)
+foo1 (uint32x4_t *addr, float32x4_t value)
{
- vstrwq_scatter_base_wb (addr, 8, value);
+ return vstrwq_scatter_base_wb (addr, 0, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler-times "vstrw.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c
index 4befd49d7b9..8d217d46230 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c
@@ -1,19 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|)
+** ...
+*/
void
-foo (uint32x4_t * addr, const int offset, float32x4_t value, mve_pred16_t p)
+foo (uint32x4_t *addr, float32x4_t value, mve_pred16_t p)
{
- vstrwq_scatter_base_wb_p_f32 (addr, 8, value, p);
+ return vstrwq_scatter_base_wb_p_f32 (addr, 0, value, p);
}
+
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|)
+** ...
+*/
void
-foo1 (uint32x4_t * addr, const int offset, float32x4_t value, mve_pred16_t p)
+foo1 (uint32x4_t *addr, float32x4_t value, mve_pred16_t p)
{
- vstrwq_scatter_base_wb_p (addr, 8, value, p);
+ return vstrwq_scatter_base_wb_p (addr, 0, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler-times "vstrwt.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c
index dfb1827c4f0..afc47adcd7f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c
@@ -1,19 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|)
+** ...
+*/
void
-foo (uint32x4_t * addr, const int offset, int32x4_t value, mve_pred16_t p)
+foo (uint32x4_t *addr, int32x4_t value, mve_pred16_t p)
{
- vstrwq_scatter_base_wb_p_s32 (addr, 8, value, p);
+ return vstrwq_scatter_base_wb_p_s32 (addr, 0, value, p);
}
+
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|)
+** ...
+*/
void
-foo1 (uint32x4_t * addr, const int offset, int32x4_t value, mve_pred16_t p)
+foo1 (uint32x4_t *addr, int32x4_t value, mve_pred16_t p)
{
- vstrwq_scatter_base_wb_p (addr, 8, value, p);
+ return vstrwq_scatter_base_wb_p (addr, 0, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler-times "vstrwt.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c
index 4eb78c600be..65191c2f1ed 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c
@@ -1,19 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|)
+** ...
+*/
void
-foo (uint32x4_t * addr, const int offset, uint32x4_t value, mve_pred16_t p)
+foo (uint32x4_t *addr, uint32x4_t value, mve_pred16_t p)
{
- vstrwq_scatter_base_wb_p_u32 (addr, 8, value, p);
+ return vstrwq_scatter_base_wb_p_u32 (addr, 0, value, p);
}
+
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|)
+** ...
+*/
void
-foo1 (uint32x4_t * addr, const int offset, uint32x4_t value, mve_pred16_t p)
+foo1 (uint32x4_t *addr, uint32x4_t value, mve_pred16_t p)
{
- vstrwq_scatter_base_wb_p (addr, 8, value, p);
+ return vstrwq_scatter_base_wb_p (addr, 0, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler-times "vstrwt.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c
index 618dbaf5aa6..b6a9f6cd1f4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c
@@ -1,19 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|)
+** ...
+*/
void
-foo (uint32x4_t * addr, const int offset, int32x4_t value)
+foo (uint32x4_t *addr, int32x4_t value)
{
- vstrwq_scatter_base_wb_s32 (addr, 8, value);
+ return vstrwq_scatter_base_wb_s32 (addr, 0, value);
}
+
+/*
+**foo1:
+** ...
+** vstrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|)
+** ...
+*/
void
-foo1 (uint32x4_t * addr, const int offset, int32x4_t value)
+foo1 (uint32x4_t *addr, int32x4_t value)
{
- vstrwq_scatter_base_wb (addr, 8, value);
+ return vstrwq_scatter_base_wb (addr, 0, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler-times "vstrw.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c
index 912a4590cf5..81a278f4e2b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c
@@ -1,19 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|)
+** ...
+*/
void
-foo (uint32x4_t * addr, uint32x4_t value)
+foo (uint32x4_t *addr, uint32x4_t value)
{
- vstrwq_scatter_base_wb_u32 (addr, 8, value);
+ return vstrwq_scatter_base_wb_u32 (addr, 0, value);
}
+
+/*
+**foo1:
+** ...
+** vstrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|)
+** ...
+*/
void
-foo1 (uint32x4_t * addr, uint32x4_t value)
+foo1 (uint32x4_t *addr, uint32x4_t value)
{
- vstrwq_scatter_base_wb (addr, 8, value);
+ return vstrwq_scatter_base_wb (addr, 0, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler-times "vstrw.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_f32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_f32.c
index c14d3ce607b..b81df68aa21 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_f32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (float32_t * base, uint32x4_t offset, float32x4_t value)
+foo (float32_t *base, uint32x4_t offset, float32x4_t value)
{
- vstrwq_scatter_offset_f32 (base, offset, value);
+ return vstrwq_scatter_offset_f32 (base, offset, value);
}
-/* { dg-final { scan-assembler "vstrw.32" } } */
+/*
+**foo1:
+** ...
+** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (float32_t * base, uint32x4_t offset, float32x4_t value)
+foo1 (float32_t *base, uint32x4_t offset, float32x4_t value)
{
- vstrwq_scatter_offset (base, offset, value);
+ return vstrwq_scatter_offset (base, offset, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrw.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_f32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_f32.c
index 115be56ec00..8aee42f76a3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_f32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (float32_t * base, uint32x4_t offset, float32x4_t value, mve_pred16_t p)
+foo (float32_t *base, uint32x4_t offset, float32x4_t value, mve_pred16_t p)
{
- vstrwq_scatter_offset_p_f32 (base, offset, value, p);
+ return vstrwq_scatter_offset_p_f32 (base, offset, value, p);
}
-/* { dg-final { scan-assembler "vstrwt.32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (float32_t * base, uint32x4_t offset, float32x4_t value, mve_pred16_t p)
+foo1 (float32_t *base, uint32x4_t offset, float32x4_t value, mve_pred16_t p)
{
- vstrwq_scatter_offset_p (base, offset, value, p);
+ return vstrwq_scatter_offset_p (base, offset, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrwt.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_s32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_s32.c
index 48652af3cff..9c74ae7a8d8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_s32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (int32_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
+foo (int32_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
{
- vstrwq_scatter_offset_p_s32 (base, offset, value, p);
+ return vstrwq_scatter_offset_p_s32 (base, offset, value, p);
}
-/* { dg-final { scan-assembler "vstrwt.32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (int32_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
+foo1 (int32_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
{
- vstrwq_scatter_offset_p (base, offset, value, p);
+ return vstrwq_scatter_offset_p (base, offset, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrwt.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_u32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_u32.c
index dcd42ec453f..015a202b548 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_u32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (uint32_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
+foo (uint32_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
{
- vstrwq_scatter_offset_p_u32 (base, offset, value, p);
+ return vstrwq_scatter_offset_p_u32 (base, offset, value, p);
}
-/* { dg-final { scan-assembler "vstrwt.32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (uint32_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
+foo1 (uint32_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
{
- vstrwq_scatter_offset_p (base, offset, value, p);
+ return vstrwq_scatter_offset_p (base, offset, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrwt.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_s32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_s32.c
index 04672e5a4aa..df373111b78 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (int32_t * base, uint32x4_t offset, int32x4_t value)
+foo (int32_t *base, uint32x4_t offset, int32x4_t value)
{
- vstrwq_scatter_offset_s32 (base, offset, value);
+ return vstrwq_scatter_offset_s32 (base, offset, value);
}
-/* { dg-final { scan-assembler "vstrw.32" } } */
+/*
+**foo1:
+** ...
+** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (int32_t * base, uint32x4_t offset, int32x4_t value)
+foo1 (int32_t *base, uint32x4_t offset, int32x4_t value)
{
- vstrwq_scatter_offset (base, offset, value);
+ return vstrwq_scatter_offset (base, offset, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrw.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_u32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_u32.c
index e3d312550c6..a74696ca273 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_u32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (uint32_t * base, uint32x4_t offset, uint32x4_t value)
+foo (uint32_t *base, uint32x4_t offset, uint32x4_t value)
{
- vstrwq_scatter_offset_u32 (base, offset, value);
+ return vstrwq_scatter_offset_u32 (base, offset, value);
}
-/* { dg-final { scan-assembler "vstrw.32" } } */
+/*
+**foo1:
+** ...
+** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (uint32_t * base, uint32x4_t offset, uint32x4_t value)
+foo1 (uint32_t *base, uint32x4_t offset, uint32x4_t value)
{
- vstrwq_scatter_offset (base, offset, value);
+ return vstrwq_scatter_offset (base, offset, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrw.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_f32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_f32.c
index b20c4c7ed3a..1c9b29a57b8 100644
---
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_f32.c
+++
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_f32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:
@.*|)
+** ...
+*/
void
-foo (float32_t * base, uint32x4_t offset, float32x4_t value)
+foo (float32_t *base, uint32x4_t offset, float32x4_t value)
{
- vstrwq_scatter_shifted_offset_f32 (base, offset, value);
+ return vstrwq_scatter_shifted_offset_f32 (base, offset, value);
}
-/* { dg-final { scan-assembler "vstrw.32" } } */
+/*
+**foo1:
+** ...
+** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:
@.*|)
+** ...
+*/
void
-foo1 (float32_t * base, uint32x4_t offset, float32x4_t value)
+foo1 (float32_t *base, uint32x4_t offset, float32x4_t value)
{
- vstrwq_scatter_shifted_offset (base, offset, value);
+ return vstrwq_scatter_shifted_offset (base, offset, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrw.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_f32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_f32.c
index 1682f702dc6..08e1572854e 100644
---
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_f32.c
+++
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_f32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:
@.*|)
+** ...
+*/
void
-foo (float32_t * base, uint32x4_t offset, float32x4_t value, mve_pred16_t p)
+foo (float32_t *base, uint32x4_t offset, float32x4_t value, mve_pred16_t p)
{
- vstrwq_scatter_shifted_offset_p_f32 (base, offset, value, p);
+ return vstrwq_scatter_shifted_offset_p_f32 (base, offset, value, p);
}
-/* { dg-final { scan-assembler "vstrwt.32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:
@.*|)
+** ...
+*/
void
-foo1 (float32_t * base, uint32x4_t offset, float32x4_t value, mve_pred16_t p)
+foo1 (float32_t *base, uint32x4_t offset, float32x4_t value, mve_pred16_t p)
{
- vstrwq_scatter_shifted_offset_p (base, offset, value, p);
+ return vstrwq_scatter_shifted_offset_p (base, offset, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrwt.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_s32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_s32.c
index eef6ea6e196..2b8f8a7d61f 100644
---
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_s32.c
+++
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_s32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:
@.*|)
+** ...
+*/
void
-foo (int32_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
+foo (int32_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
{
- vstrwq_scatter_shifted_offset_p_s32 (base, offset, value, p);
+ return vstrwq_scatter_shifted_offset_p_s32 (base, offset, value, p);
}
-/* { dg-final { scan-assembler "vstrwt.32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:
@.*|)
+** ...
+*/
void
-foo1 (int32_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
+foo1 (int32_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
{
- vstrwq_scatter_shifted_offset_p (base, offset, value, p);
+ return vstrwq_scatter_shifted_offset_p (base, offset, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrwt.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_u32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_u32.c
index b11e7e04dc4..3e4e87bf79a 100644
---
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_u32.c
+++
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_u32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:
@.*|)
+** ...
+*/
void
-foo (uint32_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
+foo (uint32_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
{
- vstrwq_scatter_shifted_offset_p_u32 (base, offset, value, p);
+ return vstrwq_scatter_shifted_offset_p_u32 (base, offset, value, p);
}
-/* { dg-final { scan-assembler "vstrwt.32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:
@.*|)
+** ...
+*/
void
-foo1 (uint32_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
+foo1 (uint32_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
{
- vstrwq_scatter_shifted_offset_p (base, offset, value, p);
+ return vstrwq_scatter_shifted_offset_p (base, offset, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrwt.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_s32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_s32.c
index 8ac25c47554..7f25490a69a 100644
---
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_s32.c
+++
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:
@.*|)
+** ...
+*/
void
-foo (int32_t * base, uint32x4_t offset, int32x4_t value)
+foo (int32_t *base, uint32x4_t offset, int32x4_t value)
{
- vstrwq_scatter_shifted_offset_s32 (base, offset, value);
+ return vstrwq_scatter_shifted_offset_s32 (base, offset, value);
}
-/* { dg-final { scan-assembler "vstrw.32" } } */
+/*
+**foo1:
+** ...
+** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:
@.*|)
+** ...
+*/
void
-foo1 (int32_t * base, uint32x4_t offset, int32x4_t value)
+foo1 (int32_t *base, uint32x4_t offset, int32x4_t value)
{
- vstrwq_scatter_shifted_offset (base, offset, value);
+ return vstrwq_scatter_shifted_offset (base, offset, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrw.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_u32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_u32.c
index 1ce0ddacc7a..a96220c4f6e 100644
---
a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_u32.c
+++
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_u32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:
@.*|)
+** ...
+*/
void
-foo (uint32_t * base, uint32x4_t offset, uint32x4_t value)
+foo (uint32_t *base, uint32x4_t offset, uint32x4_t value)
{
- vstrwq_scatter_shifted_offset_u32 (base, offset, value);
+ return vstrwq_scatter_shifted_offset_u32 (base, offset, value);
}
-/* { dg-final { scan-assembler "vstrw.32" } } */
+/*
+**foo1:
+** ...
+** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:
@.*|)
+** ...
+*/
void
-foo1 (uint32_t * base, uint32x4_t offset, uint32x4_t value)
+foo1 (uint32_t *base, uint32x4_t offset, uint32x4_t value)
{
- vstrwq_scatter_shifted_offset (base, offset, value);
+ return vstrwq_scatter_shifted_offset (base, offset, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrw.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_u32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_u32.c
index 4aec9935b84..df554af79a6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_u32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (uint32_t * addr, uint32x4_t value)
+foo (uint32_t *base, uint32x4_t value)
{
- vstrwq_u32 (addr, value);
+ return vstrwq_u32 (base, value);
}
-/* { dg-final { scan-assembler "vstrw.32" } } */
+/*
+**foo1:
+** ...
+** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (uint32_t * addr, uint32x4_t value)
+foo1 (uint32_t *base, uint32x4_t value)
{
- vstrwq (addr, value);
+ return vstrwq (base, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrw.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */