> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/single_rgroup-1.c
> b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/single_rgroup-1.c
> new file mode 100644
> index 00000000000..6384888dd03
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/single_rgroup-1.c
> @@ -0,0 +1,8 @@
> +/* { dg-do compile } */
> +/* { dg-additional-options "-march=rv32gcv -mabi=ilp32d --param
> riscv-autovec-preference=scalable -fno-vect-cost-model
> -fno-tree-loop-distribute-patterns" } */
> +
> +#include "single_rgroup-1.h"
> +
> +TEST_ALL (test_1)
> +
> +/* { dg-final { scan-assembler-times {vsetvli} 10 } } */
Why scan # of vsetvli? did you mind explain more about this testcase?
maybe this should check something like { dg-final {
scan-tree-dump-times "vectorized 1 loops in function" 3 "vect" } } ?
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/scalable-1.c
> b/gcc/testsuite/gcc.target/riscv/rvv/autovec/scalable-1.c
> new file mode 100644
> index 00000000000..e1236e678ef
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/scalable-1.c
> @@ -0,0 +1,15 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv32gc_zve64d -mabi=ilp32 -O3 -fno-vect-cost-model
> --param=riscv-autovec-preference=scalable" } */
> +
> +#include "riscv_vector.h"
> +
> +void
> +f (int32_t *__restrict f, int32_t *__restrict d, int n)
> +{
> + for (int i = 0; i < n; ++i)
> + {
> + f[i * 2 + 0] = 1;
> + f[i * 2 + 1] = 2;
> + d[i] = 3;
> + }
> +}
Didn't check anything?
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/v-1.c
> b/gcc/testsuite/gcc.target/riscv/rvv/autovec/v-1.c
> new file mode 100644
> index 00000000000..e5e54d08d3e
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/v-1.c
> @@ -0,0 +1,9 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv32gcv -mabi=ilp32d --param
> riscv-autovec-preference=scalable -fdump-tree-vect-details -save-temps" } */
Why save-temps? this flag also appear in many other testcase, remove
that if not necessary.
> +
> +#include "template-1.h"
> +
> +/* Currently, we don't support SLP auto-vectorization for VLA. But it's
> + necessary that we add this testcase here to make sure such unsupported SLP
> + auto-vectorization will not cause an ICE. We will enable "vect" checking
> when
> + we support SLP auto-vectorization for VLA in the future. */
Didn't check anything?
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f-1.c
> b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f-1.c
> new file mode 100644
> index 00000000000..066d4ae7f84
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f-1.c
> @@ -0,0 +1,4 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv32gc_zve32f -mabi=ilp32d --param
> riscv-autovec-preference=scalable -fdump-tree-vect-details -save-temps" } */
> +
> +#include "template-1.h"
Didn't check anything?
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f-2.c
> b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f-2.c
> new file mode 100644
> index 00000000000..9c9123d75f2
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f-2.c
> @@ -0,0 +1,5 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv32gc_zve32f -mabi=ilp32d --param
> riscv-autovec-preference=fixed-vlmax -fdump-tree-vect-details -save-temps" }
> */
> +
> +#include "template-1.h"
> +
Didn't check anything?
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f_zvl128b-1.c
> b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f_zvl128b-1.c
> new file mode 100644
> index 00000000000..ef70c006ec5
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f_zvl128b-1.c
> @@ -0,0 +1,4 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv32gc_zve32f_zvl128b -mabi=ilp32d --param
> riscv-autovec-preference=scalable -fdump-tree-vect-details -save-temps" } */
> +
> +#include "template-1.h"
Didn't check anything?
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x-1.c
> b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x-1.c
> new file mode 100644
> index 00000000000..80e69ee8e66
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x-1.c
> @@ -0,0 +1,4 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv32gc_zve32x -mabi=ilp32d --param
> riscv-autovec-preference=scalable -fdump-tree-vect-details -save-temps" } */
> +
> +#include "template-1.h"
Didn't check anything?
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x-2.c
> b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x-2.c
> new file mode 100644
> index 00000000000..f7be76965ef
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x-2.c
> @@ -0,0 +1,6 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv32gc_zve32x -mabi=ilp32d --param
> riscv-autovec-preference=fixed-vlmax -fdump-tree-vect-details -save-temps" }
> */
> +
> +#include "template-1.h"
> +
> +
Didn't check anything?
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x_zvl128b-1.c
> b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x_zvl128b-1.c
> new file mode 100644
> index 00000000000..48c810a08b0
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x_zvl128b-1.c
> @@ -0,0 +1,5 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv32gc_zve32x_zvl128b -mabi=ilp32d --param
> riscv-autovec-preference=scalable -fdump-tree-vect-details -save-temps" } */
> +
> +#include "template-1.h"
> +
Didn't check anything?
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d-1.c
> b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d-1.c
> new file mode 100644
> index 00000000000..24300721f6b
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d-1.c
> @@ -0,0 +1,4 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv32gc_zve64d -mabi=ilp32d --param
> riscv-autovec-preference=scalable -fdump-tree-vect-details -save-temps" } */
> +
> +#include "template-1.h"
Didn't check anything?
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d-2.c
> b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d-2.c
> new file mode 100644
> index 00000000000..283752d479a
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d-2.c
> @@ -0,0 +1,4 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv32gc_zve64d -mabi=ilp32d --param
> riscv-autovec-preference=fixed-vlmax -fdump-tree-vect-details -save-temps" }
> */
> +
> +#include "template-1.h"
Didn't check anything?
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d_zvl128b-1.c
> b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d_zvl128b-1.c
> new file mode 100644
> index 00000000000..f87c6283e2e
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d_zvl128b-1.c
> @@ -0,0 +1,4 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv32gc_zve64d_zvl128b -mabi=ilp32d --param
> riscv-autovec-preference=scalable -fdump-tree-vect-details -save-temps" } */
> +
> +#include "template-1.h"
Didn't check anything?
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f-1.c
> b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f-1.c
> new file mode 100644
> index 00000000000..aac10b6d2ab
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f-1.c
> @@ -0,0 +1,4 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv32gc_zve64f -mabi=ilp32d --param
> riscv-autovec-preference=scalable -fdump-tree-vect-details -save-temps" } */
> +
> +#include "template-1.h"
Didn't check anything?
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f-2.c
> b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f-2.c
> new file mode 100644
> index 00000000000..781f3bbce73
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f-2.c
> @@ -0,0 +1,4 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv32gc_zve64f -mabi=ilp32d --param
> riscv-autovec-preference=fixed-vlmax -fdump-tree-vect-details -save-temps" }
> */
> +
> +#include "template-1.h"
Didn't check anything?
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f_zvl128b-1.c
> b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f_zvl128b-1.c
> new file mode 100644
> index 00000000000..e4c8c056077
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f_zvl128b-1.c
> @@ -0,0 +1,4 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv32gc_zve64f_zvl128b -mabi=ilp32d --param
> riscv-autovec-preference=scalable -fdump-tree-vect-details -save-temps" } */
> +
> +#include "template-1.h"
Didn't check anything?
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x-1.c
> b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x-1.c
> new file mode 100644
> index 00000000000..bac310af690
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x-1.c
> @@ -0,0 +1,4 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv32gc_zve64x -mabi=ilp32d --param
> riscv-autovec-preference=scalable -fdump-tree-vect-details -save-temps" } */
> +
> +#include "template-1.h"
Didn't check anything?
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x-2.c
> b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x-2.c
> new file mode 100644
> index 00000000000..5ec8906fd2b
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x-2.c
> @@ -0,0 +1,4 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv32gc_zve64x -mabi=ilp32d --param
> riscv-autovec-preference=fixed-vlmax -fdump-tree-vect-details -save-temps" }
> */
> +
> +#include "template-1.h"
Didn't check anything?
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x_zvl128b-1.c
> b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x_zvl128b-1.c
> new file mode 100644
> index 00000000000..67be8501f66
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x_zvl128b-1.c
> @@ -0,0 +1,4 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv32gc_zve64x_zvl128b -mabi=ilp32d --param
> riscv-autovec-preference=scalable -fdump-tree-vect-details -save-temps" } */
> +
> +#include "template-1.h"
Didn't check anything?
