r14-172-g0368d169492017 replaces GENERAL_REGS with NO_REGS in cost calculation when the preferred register class are not known yet. It regressed powerpc PR109610 and PR109858, it looks too aggressive to use NO_REGS when mode can be allocated with GENERAL_REGS. The patch takes a step back, still use GENERAL_REGS when hard_regno_mode_ok for mode and GENERAL_REGS, otherwise uses NO_REGS. Kewen confirmed the patch fixed PR109858, I vefiried it also fixed PR109610.
Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. No big performance impact for SPEC2017 on icelake server. Ok for trunk? gcc/ChangeLog: * ira-costs.cc (scan_one_insn): Only use NO_REGS in cost calculation when !hard_regno_mode_ok for GENERAL_REGS and mode, otherwise still use GENERAL_REGS. --- gcc/ira-costs.cc | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/gcc/ira-costs.cc b/gcc/ira-costs.cc index d2a801ab9b0..ae8304ff938 100644 --- a/gcc/ira-costs.cc +++ b/gcc/ira-costs.cc @@ -1572,12 +1572,16 @@ scan_one_insn (rtx_insn *insn) && (! ira_use_lra_p || ! pic_offset_table_rtx || ! contains_symbol_ref_p (XEXP (note, 0)))) { - /* Costs for NO_REGS are used in cost calculation on the - 1st pass when the preferred register classes are not - known yet. In this case we take the best scenario. */ - enum reg_class cl = NO_REGS; + enum reg_class cl = GENERAL_REGS; rtx reg = SET_DEST (set); int num = COST_INDEX (REGNO (reg)); + /* Costs for NO_REGS are used in cost calculation on the + 1st pass when the preferred register classes are not + known yet. In this case we take the best scenario when + mode can't be put into GENERAL_REGS. */ + if (!targetm.hard_regno_mode_ok (ira_class_hard_regs[cl][0], + GET_MODE (reg))) + cl = NO_REGS; COSTS (costs, num)->mem_cost -= ira_memory_move_cost[GET_MODE (reg)][cl][1] * frequency; -- 2.39.1.388.g2fc9e9ca3c