> gcc/ChangeLog: > > * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): > Rewrite to expand to 2x-wider (e.g. V16QI -> V16HImode) > instructions when available. Emulate truncation via > ix86_expand_vec_perm_const_1 when native truncate insn > is not available. > (ix86_expand_vecop_qihi_partial) <case MULT>: Use pmovzx > when available. Trivially rename some variables. > (ix86_expand_vecop_qihi): Unconditionally call ix86_expand_vecop_qihi2.
Hi Uros, I suppose you pushed wrong patch to trunk. On trunk, we see this: @@ -23409,9 +23457,7 @@ ix86_expand_vecop_qihi (enum rtx_code code, rtx dest, rtx op1, rtx op2) && ix86_expand_vec_shift_qihi_constant (code, dest, op1, op2)) return; - if (TARGET_AVX512BW - && VECTOR_MODE_P (GET_MODE (op2)) - && ix86_expand_vecop_qihi2 (code, dest, op1, op2)) + if (0 && ix86_expand_vecop_qihi2 (code, dest, op1, op2)) return; switch (qimode) It should not be if (0 && ix86_expand_vecop_qihi2 (code, dest, op1, op2)) The patch in this thread is correct, where is: @@ -23409,9 +23457,7 @@ ix86_expand_vecop_qihi (enum rtx_code code, rtx dest, rtx op1, rtx op2) && ix86_expand_vec_shift_qihi_constant (code, dest, op1, op2)) return; - if (TARGET_AVX512BW - && VECTOR_MODE_P (GET_MODE (op2)) - && ix86_expand_vecop_qihi2 (code, dest, op1, op2)) + if (ix86_expand_vecop_qihi2 (code, dest, op1, op2)) return; switch (qimode) Thx, Haochen > * config/i386/i386.cc (ix86_multiplication_cost): Rewrite cost > calculation of V*QImode emulations to account for generation of > 2x-wider mode instructions. > (ix86_shift_rotate_cost): Update cost calculation of V*QImode > emulations to account for generation of 2x-wider mode instructions. > > gcc/testsuite/ChangeLog: > > * gcc.target/i386/avx512vl-pr95488-1.c: Revert 2023-05-18 change. > > Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. > > Uros.