LGTM
On Mon, May 29, 2023 at 10:24 AM Pan Li via Gcc-patches <gcc-patches@gcc.gnu.org> wrote: > > From: Pan Li <pan2...@intel.com> > > This patch would like to add new sub extension (aka ZVFHMIN) to the > -march= option. To make it simple, only the sub extension itself is > involved in this patch, and the underlying FP16 related RVV intrinsic > API depends on the TARGET_ZVFHMIN. > > The Zvfhmin extension depends on the Zve32f extension. You can locate > more information about ZVFHMIN from below spec doc. > > https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#zvfhmin-vector-extension-for-minimal-half-precision-floating-point > > Signed-off-by: Pan Li <pan2...@intel.com> > > gcc/ChangeLog: > > * common/config/riscv/riscv-common.cc: > (riscv_implied_info): Add zvfhmin item. > (riscv_ext_version_table): Ditto. > (riscv_ext_flag_table): Ditto. > * config/riscv/riscv-opts.h (MASK_ZVFHMIN): New macro. > (TARGET_ZFHMIN): Align indent. > (TARGET_ZFH): Ditto. > (TARGET_ZVFHMIN): New macro. > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/arch-20.c: New test. > * gcc.target/riscv/predef-26.c: New test. > > Signed-off-by: Pan Li <pan2...@intel.com> > --- > gcc/common/config/riscv/riscv-common.cc | 3 ++ > gcc/config/riscv/riscv-opts.h | 6 ++- > gcc/testsuite/gcc.target/riscv/arch-20.c | 5 +++ > gcc/testsuite/gcc.target/riscv/predef-26.c | 51 ++++++++++++++++++++++ > 4 files changed, 63 insertions(+), 2 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/riscv/arch-20.c > create mode 100644 gcc/testsuite/gcc.target/riscv/predef-26.c > > diff --git a/gcc/common/config/riscv/riscv-common.cc > b/gcc/common/config/riscv/riscv-common.cc > index c2ec74b9d92..92edafb516d 100644 > --- a/gcc/common/config/riscv/riscv-common.cc > +++ b/gcc/common/config/riscv/riscv-common.cc > @@ -104,6 +104,7 @@ static const riscv_implied_info_t riscv_implied_info[] = > > {"zfh", "zfhmin"}, > {"zfhmin", "f"}, > + {"zvfhmin", "zve32f"}, > > {"zhinx", "zhinxmin"}, > {"zhinxmin", "zfinx"}, > @@ -216,6 +217,7 @@ static const struct riscv_ext_version > riscv_ext_version_table[] = > > {"zfh", ISA_SPEC_CLASS_NONE, 1, 0}, > {"zfhmin", ISA_SPEC_CLASS_NONE, 1, 0}, > + {"zvfhmin", ISA_SPEC_CLASS_NONE, 1, 0}, > > {"zmmul", ISA_SPEC_CLASS_NONE, 1, 0}, > > @@ -1259,6 +1261,7 @@ static const riscv_ext_flag_table_t > riscv_ext_flag_table[] = > > {"zfhmin", &gcc_options::x_riscv_zf_subext, MASK_ZFHMIN}, > {"zfh", &gcc_options::x_riscv_zf_subext, MASK_ZFH}, > + {"zvfhmin", &gcc_options::x_riscv_zf_subext, MASK_ZVFHMIN}, > > {"zmmul", &gcc_options::x_riscv_zm_subext, MASK_ZMMUL}, > > diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h > index 2a16402265a..f34ca993689 100644 > --- a/gcc/config/riscv/riscv-opts.h > +++ b/gcc/config/riscv/riscv-opts.h > @@ -200,9 +200,11 @@ enum riscv_entity > > #define MASK_ZFHMIN (1 << 0) > #define MASK_ZFH (1 << 1) > +#define MASK_ZVFHMIN (1 << 2) > > -#define TARGET_ZFHMIN ((riscv_zf_subext & MASK_ZFHMIN) != 0) > -#define TARGET_ZFH ((riscv_zf_subext & MASK_ZFH) != 0) > +#define TARGET_ZFHMIN ((riscv_zf_subext & MASK_ZFHMIN) != 0) > +#define TARGET_ZFH ((riscv_zf_subext & MASK_ZFH) != 0) > +#define TARGET_ZVFHMIN ((riscv_zf_subext & MASK_ZVFHMIN) != 0) > > #define MASK_ZMMUL (1 << 0) > #define TARGET_ZMMUL ((riscv_zm_subext & MASK_ZMMUL) != 0) > diff --git a/gcc/testsuite/gcc.target/riscv/arch-20.c > b/gcc/testsuite/gcc.target/riscv/arch-20.c > new file mode 100644 > index 00000000000..8f8da1ecd65 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/arch-20.c > @@ -0,0 +1,5 @@ > +/* { dg-do compile } */ > +/* { dg-options "-O2 -march=rv32gcv_zvfhmin -mabi=ilp32 -mcmodel=medlow" } */ > +int foo() > +{ > +} > diff --git a/gcc/testsuite/gcc.target/riscv/predef-26.c > b/gcc/testsuite/gcc.target/riscv/predef-26.c > new file mode 100644 > index 00000000000..285f64bd6c0 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/predef-26.c > @@ -0,0 +1,51 @@ > +/* { dg-do compile } */ > +/* { dg-options "-O2 -march=rv64i_zvfhmin -mabi=lp64f -mcmodel=medlow > -misa-spec=20191213" } */ > + > +int main () { > + > +#ifndef __riscv_arch_test > +#error "__riscv_arch_test" > +#endif > + > +#if __riscv_xlen != 64 > +#error "__riscv_xlen" > +#endif > + > +#if !defined(__riscv_i) > +#error "__riscv_i" > +#endif > + > +#if !defined(__riscv_f) > +#error "__riscv_f" > +#endif > + > +#if !defined(__riscv_zvfhmin) > +#error "__riscv_zvfhmin" > +#endif > + > +#if defined(__riscv_v) > +#error "__riscv_v" > +#endif > + > +#if defined(__riscv_d) > +#error "__riscv_d" > +#endif > + > +#if defined(__riscv_c) > +#error "__riscv_c" > +#endif > + > +#if defined(__riscv_a) > +#error "__riscv_a" > +#endif > + > +#if defined(__riscv_zfh) > +#error "__riscv_zfh" > +#endif > + > +#if defined(__riscv_zfhmin) > +#error "__riscv_zfhmin" > +#endif > + > + return 0; > +} > -- > 2.34.1 >
