Committed, thanks Kito.
Pan
-----Original Message-----
From: Kito Cheng <kito.ch...@sifive.com>
Sent: Monday, May 29, 2023 9:30 PM
To: Li, Pan2 <pan2...@intel.com>
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
<yanzhang.w...@intel.com>; rdapp....@gmail.com
Subject: Re: [PATCH v1] RISC-V: Refactor comments and naming of riscv-v.cc.
LGTM
On Mon, May 29, 2023 at 9:03 PM <pan2...@intel.com> wrote:
>
> From: Pan Li <pan2...@intel.com>
>
> This patch would like to remove unnecessary comments of some self
> explained parameters and try a better name to avoid misleading.
>
> Signed-off-by: Pan Li <pan2...@intel.com>
>
> gcc/ChangeLog:
>
> * config/riscv/riscv-v.cc (emit_vlmax_insn): Remove unnecessary
> comments and rename local variables.
> (emit_nonvlmax_insn): Diito.
> (emit_vlmax_merge_insn): Ditto.
> (emit_vlmax_cmp_insn): Ditto.
> (emit_vlmax_cmp_mu_insn): Ditto.
> (emit_scalar_move_insn): Ditto.
>
> Signed-off-by: Pan Li <pan2...@intel.com>
> ---
> gcc/config/riscv/riscv-v.cc | 96
> +++++++++++++++++++------------------
> 1 file changed, 49 insertions(+), 47 deletions(-)
>
> diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
> index 20b589bf51b..6ec24dba98d 100644
> --- a/gcc/config/riscv/riscv-v.cc
> +++ b/gcc/config/riscv/riscv-v.cc
> @@ -349,16 +349,16 @@ autovec_use_vlmax_p (void) void
> emit_vlmax_insn (unsigned icode, int op_num, rtx *ops, rtx vl) {
> - machine_mode data_mode = GET_MODE (ops[0]);
> - machine_mode mask_mode = get_mask_mode (data_mode).require ();
> - insn_expander<RVV_INSN_OPERANDS_MAX> e (/*OP_NUM*/ op_num,
> - /*HAS_DEST_P*/ true,
> - /*FULLY_UNMASKED_P*/ true,
> - /*USE_REAL_MERGE_P*/ false,
> - /*HAS_AVL_P*/ true,
> - /*VLMAX_P*/ true,
> - /*DEST_MODE*/ data_mode,
> - /*MASK_MODE*/ mask_mode);
> + machine_mode dest_mode = GET_MODE (ops[0]); machine_mode mask_mode
> + = get_mask_mode (dest_mode).require ();
> + insn_expander<RVV_INSN_OPERANDS_MAX> e (op_num,
> + /* HAS_DEST_P */ true,
> + /* FULLY_UNMASKED_P */ true,
> + /* USE_REAL_MERGE_P */ false,
> + /* HAS_AVL_P */ true,
> + /* VLMAX_P */ true,
> + dest_mode,
> + mask_mode);
>
> e.set_policy (TAIL_ANY);
> e.set_policy (MASK_ANY);
> @@ -373,16 +373,16 @@ emit_vlmax_insn (unsigned icode, int op_num, rtx
> *ops, rtx vl) void emit_nonvlmax_insn (unsigned icode, int op_num,
> rtx *ops, rtx avl) {
> - machine_mode data_mode = GET_MODE (ops[0]);
> - machine_mode mask_mode = get_mask_mode (data_mode).require ();
> - insn_expander<RVV_INSN_OPERANDS_MAX> e (/*OP_NUM*/ op_num,
> - /*HAS_DEST_P*/ true,
> - /*FULLY_UNMASKED_P*/ true,
> - /*USE_REAL_MERGE_P*/ false,
> - /*HAS_AVL_P*/ true,
> - /*VLMAX_P*/ false,
> - /*DEST_MODE*/ data_mode,
> - /*MASK_MODE*/ mask_mode);
> + machine_mode dest_mode = GET_MODE (ops[0]); machine_mode mask_mode
> + = get_mask_mode (dest_mode).require ();
> + insn_expander<RVV_INSN_OPERANDS_MAX> e (op_num,
> + /* HAS_DEST_P */ true,
> + /* FULLY_UNMASKED_P */ true,
> + /* USE_REAL_MERGE_P */ false,
> + /* HAS_AVL_P */ true,
> + /* VLMAX_P */ false,
> + dest_mode,
> + mask_mode);
>
> e.set_policy (TAIL_ANY);
> e.set_policy (MASK_ANY);
> @@ -396,14 +396,14 @@ emit_vlmax_merge_insn (unsigned icode, int
> op_num, rtx *ops) {
> machine_mode dest_mode = GET_MODE (ops[0]);
> machine_mode mask_mode = get_mask_mode (dest_mode).require ();
> - insn_expander<RVV_INSN_OPERANDS_MAX> e (/*OP_NUM*/ op_num,
> - /*HAS_DEST_P*/ true,
> - /*FULLY_UNMASKED_P*/ false,
> - /*USE_REAL_MERGE_P*/ false,
> - /*HAS_AVL_P*/ true,
> - /*VLMAX_P*/ true,
> - /*DEST_MODE*/ dest_mode,
> - /*MASK_MODE*/ mask_mode);
> + insn_expander<RVV_INSN_OPERANDS_MAX> e (op_num,
> + /* HAS_DEST_P */ true,
> + /* FULLY_UNMASKED_P */ false,
> + /* USE_REAL_MERGE_P */ false,
> + /* HAS_AVL_P */ true,
> + /* VLMAX_P */ true,
> + dest_mode,
> + mask_mode);
>
> e.set_policy (TAIL_ANY);
> e.emit_insn ((enum insn_code) icode, ops); @@ -414,14 +414,14 @@
> void emit_vlmax_cmp_insn (unsigned icode, rtx *ops) {
> machine_mode mode = GET_MODE (ops[0]);
> - insn_expander<RVV_INSN_OPERANDS_MAX> e (/*OP_NUM*/ RVV_CMP_OP,
> - /*HAS_DEST_P*/ true,
> - /*FULLY_UNMASKED_P*/ true,
> - /*USE_REAL_MERGE_P*/ false,
> - /*HAS_AVL_P*/ true,
> - /*VLMAX_P*/ true,
> - /*DEST_MODE*/ mode,
> - /*MASK_MODE*/ mode);
> + insn_expander<RVV_INSN_OPERANDS_MAX> e (RVV_CMP_OP,
> + /* HAS_DEST_P */ true,
> + /* FULLY_UNMASKED_P */ true,
> + /* USE_REAL_MERGE_P */ false,
> + /* HAS_AVL_P */ true,
> + /* VLMAX_P */ true,
> + mode,
> + mode);
>
> e.set_policy (MASK_ANY);
> e.emit_insn ((enum insn_code) icode, ops); @@ -432,14 +432,14 @@
> void emit_vlmax_cmp_mu_insn (unsigned icode, rtx *ops) {
> machine_mode mode = GET_MODE (ops[0]);
> - insn_expander<RVV_INSN_OPERANDS_MAX> e (/*OP_NUM*/ RVV_CMP_MU_OP,
> - /*HAS_DEST_P*/ true,
> - /*FULLY_UNMASKED_P*/ false,
> - /*USE_REAL_MERGE_P*/ true,
> - /*HAS_AVL_P*/ true,
> - /*VLMAX_P*/ true,
> - /*DEST_MODE*/ mode,
> - /*MASK_MODE*/ mode);
> + insn_expander<RVV_INSN_OPERANDS_MAX> e (RVV_CMP_MU_OP,
> + /* HAS_DEST_P */ true,
> + /* FULLY_UNMASKED_P */ false,
> + /* USE_REAL_MERGE_P */ true,
> + /* HAS_AVL_P */ true,
> + /* VLMAX_P */ true,
> + mode,
> + mode);
>
> e.set_policy (MASK_UNDISTURBED);
> e.emit_insn ((enum insn_code) icode, ops); @@ -1450,15 +1450,17 @@
> expand_vector_init_insert_elems (rtx target, const rvv_builder
> &builder, static void emit_scalar_move_insn (unsigned icode, rtx
> *ops) {
> - machine_mode data_mode = GET_MODE (ops[0]);
> - machine_mode mask_mode = get_mask_mode (data_mode).require ();
> + machine_mode dest_mode = GET_MODE (ops[0]); machine_mode mask_mode
> + = get_mask_mode (dest_mode).require ();
> insn_expander<RVV_INSN_OPERANDS_MAX> e (riscv_vector::RVV_SCALAR_MOV_OP,
> /* HAS_DEST_P */ true,
> /* FULLY_UNMASKED_P */ false,
> /* USE_REAL_MERGE_P */ true,
> /* HAS_AVL_P */ true,
> /* VLMAX_P */ false,
> - data_mode, mask_mode);
> + dest_mode,
> + mask_mode);
> +
> e.set_policy (TAIL_ANY);
> e.set_policy (MASK_ANY);
> e.set_vl (CONST1_RTX (Pmode));
> --
> 2.34.1
>
