On 6/7/23 08:43, Jeff Law wrote:
On 6/7/23 08:13, Kito Cheng wrote:
I would like vendor cpu name start with vendor name, like
ventana-veyron-v1 which is consistent with all other vendor cpu, and
llvm are using same convention too.
Fair enough. Better to get it right now than have this stuff be
inconsistent. It'll be a little more pain for our internal folks, but
we'll deal with that :-)
I should have also noted that this seems to get a pretty consistent 1-2%
improvement across spec2017. Not surprisingly it reduces stalls at the
retirement unit due to instructions not being completed. We can see
impacts elsewhere like fewer stalls due to conflicting resources at the
dispatch stage.
It does make it more likely that we'll blow out the register file on
x264's key SATD routine which shows up as a single digit regression for
input #1. The fix there is pretty simple, use register pressure
scheduling, which we'll have some hard data on relatively soon.
jeff
