Hi DJ,
As pointed out by Hans-Peter in his patch for PR 53120 for the cris
backend, the m32c/bitops.md file contains a pattern that uses both the
"+" modifier and the "0" constraint. The patch below is a
straightforward fix for this, replacing the "0" constraint with a
match_dup. Tested with no regressions on an m32c-elf toolchain.
OK to apply ?
Cheers
Nick
gcc/ChangeLog
2012-05-02 Nick Clifton <ni...@redhat.com>
PR target/53120
* config/m32c/bitops.md (bset_qi): Change operand 2 from having
a "0" constraint to being a (match_dup 0).
Index: gcc/config/m32c/bitops.md
===================================================================
--- gcc/config/m32c/bitops.md (revision 187036)
+++ gcc/config/m32c/bitops.md (working copy)
@@ -43,7 +43,7 @@
[(set (match_operand:QI 0 "memsym_operand" "+Si")
(ior:QI (subreg:QI (ashift:HI (const_int 1)
(subreg:QI (match_operand:HI 1 "a_qi_operand"
"Raa") 0)) 0)
- (match_operand:QI 2 "memsym_operand" "0")))]
+ (match_dup 0)))]
"TARGET_A16"
"bset\t%0[%1]"
[(set_attr "flags" "n")]
