Committed, thanks Jeff. Pan
-----Original Message----- From: Gcc-patches <gcc-patches-bounces+pan2.li=intel....@gcc.gnu.org> On Behalf Of Jeff Law via Gcc-patches Sent: Saturday, June 24, 2023 10:04 PM To: Juzhe-Zhong <juzhe.zh...@rivai.ai>; gcc-patches@gcc.gnu.org Cc: kito.ch...@sifive.com; pal...@rivosinc.com; rdapp....@gmail.com Subject: Re: [PATCH] RISC-V: Refactor the integer ternary autovec pattern On 6/21/23 16:38, Juzhe-Zhong wrote: > Long time ago, I encounter ICE when trying to set clobber register as Pmode > and I forgot the reason. > > So, I clobber SI scratch and PUT_MODE to make it Pmode after reload which > makes patterns look unreasonable. > > According to Jeff's comments, I tried it again, it works now when we try to > set clobber register as Pmode and the patterns look more reasonable now. > > The tests are all passed, Ok for trunk. > > gcc/ChangeLog: > > * config/riscv/autovec.md (*fma<mode>): set clobber to Pmode in > expand stage. > (*fma<VI:mode><P:mode>): Ditto. > (*fnma<mode>): Ditto. > (*fnma<VI:mode><P:mode>): Ditto. OK jeff
